]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
KVM: arm64: Fix kvm_vcpu_{set,is}_be() to deal with EL2 state
authorMarc Zyngier <maz@kernel.org>
Tue, 16 Sep 2025 16:11:03 +0000 (17:11 +0100)
committerMarc Zyngier <maz@kernel.org>
Wed, 17 Sep 2025 16:26:57 +0000 (17:26 +0100)
Nobody really cares about BE, but KVM currently only deals with
SCTLR_EL1 when evaluating or setting the endianness in PSCI,
meaning that we evaluate whatever the L2 state has been at some point.

Teach these primitives about SCTLR_EL2, and forget about BE...

Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
arch/arm64/include/asm/kvm_emulate.h

index fa8a08a1ccd5c45a99717b7dd912ac948c1de152..85f998dffea5d21bf5f829224b39398395a35389 100644 (file)
@@ -511,21 +511,29 @@ static inline void kvm_vcpu_set_be(struct kvm_vcpu *vcpu)
        if (vcpu_mode_is_32bit(vcpu)) {
                *vcpu_cpsr(vcpu) |= PSR_AA32_E_BIT;
        } else {
-               u64 sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);
+               enum vcpu_sysreg r;
+               u64 sctlr;
+
+               r = vcpu_has_nv(vcpu) ? SCTLR_EL2 : SCTLR_EL1;
+
+               sctlr = vcpu_read_sys_reg(vcpu, r);
                sctlr |= SCTLR_ELx_EE;
-               vcpu_write_sys_reg(vcpu, sctlr, SCTLR_EL1);
+               vcpu_write_sys_reg(vcpu, sctlr, r);
        }
 }
 
 static inline bool kvm_vcpu_is_be(struct kvm_vcpu *vcpu)
 {
+       enum vcpu_sysreg r;
+       u64 bit;
+
        if (vcpu_mode_is_32bit(vcpu))
                return !!(*vcpu_cpsr(vcpu) & PSR_AA32_E_BIT);
 
-       if (vcpu_mode_priv(vcpu))
-               return !!(vcpu_read_sys_reg(vcpu, SCTLR_EL1) & SCTLR_ELx_EE);
-       else
-               return !!(vcpu_read_sys_reg(vcpu, SCTLR_EL1) & SCTLR_EL1_E0E);
+       r = is_hyp_ctxt(vcpu) ? SCTLR_EL2 : SCTLR_EL1;
+       bit = vcpu_mode_priv(vcpu) ? SCTLR_ELx_EE : SCTLR_EL1_E0E;
+
+       return vcpu_read_sys_reg(vcpu, r) & bit;
 }
 
 static inline unsigned long vcpu_data_guest_to_host(struct kvm_vcpu *vcpu,