clk: tegra: pll: convert from round_rate() to determine_rate()

The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Signed-off-by: Brian Masney <bmasney@redhat.com>

diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index 100b5d9b7e26e906f71963152ad50bd0a89d14d6..591b9f0c155a033ab46fbb0a1de742efed560b5c 100644 (file)
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -840,8 +840,8 @@ static int clk_pll_set_rate(struct clk_hw *hw, unsigned long rate,
        return ret;
 }
 
-static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate,
-                       unsigned long *prate)
+static int clk_pll_determine_rate(struct clk_hw *hw,
+                                 struct clk_rate_request *req)
 {
        struct tegra_clk_pll *pll = to_clk_pll(hw);
        struct tegra_clk_pll_freq_table cfg;
@@ -849,15 +849,20 @@ static long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate,
        if (pll->params->flags & TEGRA_PLL_FIXED) {
                /* PLLM/MB are used for memory; we do not change rate */
                if (pll->params->flags & (TEGRA_PLLM | TEGRA_PLLMB))
-                       return clk_hw_get_rate(hw);
-               return pll->params->fixed_rate;
+                       req->rate = clk_hw_get_rate(hw);
+               else
+                       req->rate = pll->params->fixed_rate;
+
+               return 0;
        }
 
-       if (_get_table_rate(hw, &cfg, rate, *prate) &&
-           pll->params->calc_rate(hw, &cfg, rate, *prate))
+       if (_get_table_rate(hw, &cfg, req->rate, req->best_parent_rate) &&
+           pll->params->calc_rate(hw, &cfg, req->rate, req->best_parent_rate))
                return -EINVAL;
 
-       return cfg.output_rate;
+       req->rate = cfg.output_rate;
+
+       return 0;
 }
 
 static unsigned long clk_pll_recalc_rate(struct clk_hw *hw,
@@ -1057,7 +1062,7 @@ const struct clk_ops tegra_clk_pll_ops = {
        .enable = clk_pll_enable,
        .disable = clk_pll_disable,
        .recalc_rate = clk_pll_recalc_rate,
-       .round_rate = clk_pll_round_rate,
+       .determine_rate = clk_pll_determine_rate,
        .set_rate = clk_pll_set_rate,
        .restore_context = tegra_clk_pll_restore_context,
 };
@@ -1195,7 +1200,7 @@ static const struct clk_ops tegra_clk_pllu_ops = {
        .enable = clk_pllu_enable,
        .disable = clk_pll_disable,
        .recalc_rate = clk_pll_recalc_rate,
-       .round_rate = clk_pll_round_rate,
+       .determine_rate = clk_pll_determine_rate,
        .set_rate = clk_pll_set_rate,
 };
 
@@ -1353,15 +1358,15 @@ static int clk_pllxc_set_rate(struct clk_hw *hw, unsigned long rate,
        return ret;
 }
 
-static long clk_pll_ramp_round_rate(struct clk_hw *hw, unsigned long rate,
-                               unsigned long *prate)
+static int clk_pll_ramp_determine_rate(struct clk_hw *hw,
+                                      struct clk_rate_request *req)
 {
        struct tegra_clk_pll *pll = to_clk_pll(hw);
        struct tegra_clk_pll_freq_table cfg;
        int ret, p_div;
-       u64 output_rate = *prate;
+       u64 output_rate = req->best_parent_rate;
 
-       ret = _pll_ramp_calc_pll(hw, &cfg, rate, *prate);
+       ret = _pll_ramp_calc_pll(hw, &cfg, req->rate, req->best_parent_rate);
        if (ret < 0)
                return ret;
 
@@ -1375,7 +1380,9 @@ static long clk_pll_ramp_round_rate(struct clk_hw *hw, unsigned long rate,
        output_rate *= cfg.n;
        do_div(output_rate, cfg.m * p_div);
 
-       return output_rate;
+       req->rate = output_rate;
+
+       return 0;
 }
 
 static void _pllcx_strobe(struct tegra_clk_pll *pll)
@@ -1598,12 +1605,15 @@ static unsigned long clk_pllre_recalc_rate(struct clk_hw *hw,
        return rate;
 }
 
-static long clk_pllre_round_rate(struct clk_hw *hw, unsigned long rate,
-                                unsigned long *prate)
+static int clk_pllre_determine_rate(struct clk_hw *hw,
+                                   struct clk_rate_request *req)
 {
        struct tegra_clk_pll *pll = to_clk_pll(hw);
 
-       return _pllre_calc_rate(pll, NULL, rate, *prate);
+       req->rate = _pllre_calc_rate(pll, NULL, req->rate,
+                                    req->best_parent_rate);
+
+       return 0;
 }
 
 static int clk_plle_tegra114_enable(struct clk_hw *hw)
@@ -2003,7 +2013,7 @@ static const struct clk_ops tegra_clk_pllxc_ops = {
        .enable = clk_pll_enable,
        .disable = clk_pll_disable,
        .recalc_rate = clk_pll_recalc_rate,
-       .round_rate = clk_pll_ramp_round_rate,
+       .determine_rate = clk_pll_ramp_determine_rate,
        .set_rate = clk_pllxc_set_rate,
 };
 
@@ -2012,7 +2022,7 @@ static const struct clk_ops tegra_clk_pllc_ops = {
        .enable = clk_pllc_enable,
        .disable = clk_pllc_disable,
        .recalc_rate = clk_pll_recalc_rate,
-       .round_rate = clk_pll_ramp_round_rate,
+       .determine_rate = clk_pll_ramp_determine_rate,
        .set_rate = clk_pllc_set_rate,
 };
 
@@ -2021,7 +2031,7 @@ static const struct clk_ops tegra_clk_pllre_ops = {
        .enable = clk_pll_enable,
        .disable = clk_pll_disable,
        .recalc_rate = clk_pllre_recalc_rate,
-       .round_rate = clk_pllre_round_rate,
+       .determine_rate = clk_pllre_determine_rate,
        .set_rate = clk_pllre_set_rate,
 };
 
@@ -2321,7 +2331,7 @@ static const struct clk_ops tegra_clk_pllss_ops = {
        .enable = clk_pll_enable,
        .disable = clk_pll_disable,
        .recalc_rate = clk_pll_recalc_rate,
-       .round_rate = clk_pll_ramp_round_rate,
+       .determine_rate = clk_pll_ramp_determine_rate,
        .set_rate = clk_pllxc_set_rate,
        .restore_context = tegra_clk_pll_restore_context,
 };