]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
pinctrl: equilibrium: use new generic GPIO chip API
authorBartosz Golaszewski <bartosz.golaszewski@linaro.org>
Mon, 11 Aug 2025 15:02:01 +0000 (17:02 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 19 Aug 2025 09:41:38 +0000 (11:41 +0200)
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/20250811-gpio-mmio-pinctrl-conv-v1-2-a84c5da2be20@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/pinctrl-equilibrium.c
drivers/pinctrl/pinctrl-equilibrium.h

index fce804d42e7d7f9233b2da0fb26e482170629424..210044185679384d03278e200d8f7723324487cd 100644 (file)
@@ -2,6 +2,7 @@
 /* Copyright (C) 2019 Intel Corporation */
 
 #include <linux/gpio/driver.h>
+#include <linux/gpio/generic.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
@@ -179,7 +180,7 @@ static int gpiochip_setup(struct device *dev, struct eqbr_gpio_ctrl *gctrl)
        struct gpio_irq_chip *girq;
        struct gpio_chip *gc;
 
-       gc = &gctrl->chip;
+       gc = &gctrl->chip.gc;
        gc->label = gctrl->name;
        gc->fwnode = gctrl->fwnode;
        gc->request = gpiochip_generic_request;
@@ -191,7 +192,7 @@ static int gpiochip_setup(struct device *dev, struct eqbr_gpio_ctrl *gctrl)
                return 0;
        }
 
-       girq = &gctrl->chip.irq;
+       girq = &gctrl->chip.gc.irq;
        gpio_irq_chip_set_chip(girq, &eqbr_irq_chip);
        girq->parent_handler = eqbr_irq_handler;
        girq->num_parents = 1;
@@ -208,6 +209,7 @@ static int gpiochip_setup(struct device *dev, struct eqbr_gpio_ctrl *gctrl)
 
 static int gpiolib_reg(struct eqbr_pinctrl_drv_data *drvdata)
 {
+       struct gpio_generic_chip_config config;
        struct device *dev = drvdata->dev;
        struct eqbr_gpio_ctrl *gctrl;
        struct device_node *np;
@@ -239,12 +241,16 @@ static int gpiolib_reg(struct eqbr_pinctrl_drv_data *drvdata)
                }
                raw_spin_lock_init(&gctrl->lock);
 
-               ret = bgpio_init(&gctrl->chip, dev, gctrl->bank->nr_pins / 8,
-                                gctrl->membase + GPIO_IN,
-                                gctrl->membase + GPIO_OUTSET,
-                                gctrl->membase + GPIO_OUTCLR,
-                                gctrl->membase + GPIO_DIR,
-                                NULL, 0);
+               config = (typeof(config)){
+                       .dev = dev,
+                       .sz = gctrl->bank->nr_pins / 8,
+                       .dat = gctrl->membase + GPIO_IN,
+                       .set = gctrl->membase + GPIO_OUTSET,
+                       .clr = gctrl->membase + GPIO_OUTCLR,
+                       .dirout = gctrl->membase + GPIO_DIR,
+               };
+
+               ret = gpio_generic_chip_init(&gctrl->chip, &config);
                if (ret) {
                        dev_err(dev, "unable to init generic GPIO\n");
                        return ret;
@@ -254,7 +260,7 @@ static int gpiolib_reg(struct eqbr_pinctrl_drv_data *drvdata)
                if (ret)
                        return ret;
 
-               ret = devm_gpiochip_add_data(dev, &gctrl->chip, gctrl);
+               ret = devm_gpiochip_add_data(dev, &gctrl->chip.gc, gctrl);
                if (ret)
                        return ret;
        }
@@ -499,7 +505,7 @@ static int eqbr_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
                                        bank->pin_base, pin);
                                return -ENODEV;
                        }
-                       gc = &gctrl->chip;
+                       gc = &gctrl->chip.gc;
                        gc->direction_output(gc, offset, 0);
                        continue;
                default:
index b4d149bde39d8dd08a962bb05ccf026364dd9f68..b56124d7fe9132c875d2768b0af8b939f1a4fbf8 100644 (file)
@@ -96,7 +96,7 @@ struct fwnode_handle;
  * @lock: spin lock to protect gpio register write.
  */
 struct eqbr_gpio_ctrl {
-       struct gpio_chip        chip;
+       struct gpio_generic_chip chip;
        struct fwnode_handle    *fwnode;
        struct eqbr_pin_bank    *bank;
        void __iomem            *membase;