ARM: dts: lpc32xx: Set motor PWM #pwm-cells property value to 3 cells

Since commit 4cd2f417a0ac ("dt-bindings: pwm: Convert lpc32xx-pwm.txt
to yaml format") both types of PWM controlles on NXP LPC32xx SoC
fairly gained 3 cells, reflect it in the platform dtsi file.

The change removes a dt binding checker warning:

    mpwm@400e8000: #pwm-cells:0:0: 3 was expected

Cc: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>

diff --git a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
index 6cf405e9b0826047dbe2ead16fe5e4101bedcbdb..916ab38f0a4c6c2473613645dfdcd3c3efb8e789 100644 (file)
--- a/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi
@@ -301,8 +301,8 @@
                        mpwm: mpwm@400e8000 {
                                compatible = "nxp,lpc3220-motor-pwm";
                                reg = <0x400e8000 0x78>;
+                               #pwm-cells = <3>;
                                status = "disabled";
-                               #pwm-cells = <2>;
                        };
                };