Support GetI/PutI of 32-bit integer arrays.

git-svn-id: svn://svn.valgrind.org/vex/trunk@1172

diff --git a/VEX/priv/host-x86/isel.c b/VEX/priv/host-x86/isel.c
index 33a1a8d7d6c48392a2462186c5b7a206552df62c..7bcf37281e603331d43ff20a95dac9abd3b0d6e7 100644 (file)
--- a/VEX/priv/host-x86/isel.c
+++ b/VEX/priv/host-x86/isel.c
@@ -560,13 +560,21 @@ X86AMode* genGuestArrayOffset ( ISelEnv* env, IRArray* descr,
    HReg tmp, roff;
    Int  elemSz = sizeofIRType(descr->elemTy);
    Int  nElems = descr->nElems;
+   Int  shift  = 0;
 
    /* throw out any cases not generated by an x86 front end.  In
       theory there might be a day where we need to handle them -- if
       we ever run non-x86-guest on x86 host. */
 
-   if (nElems != 8 || (elemSz != 1 && elemSz != 8))
-      vpanic("genGuestArrayOffset(x86 host)");
+   if (nElems != 8) 
+      vpanic("genGuestArrayOffset(x86 host)(1)");
+
+   switch (elemSz) {
+      case 1:  shift = 0; break;
+      case 4:  shift = 2; vassert(0); /* awaiting test case */ break;
+      case 8:  shift = 3; break;
+      default: vpanic("genGuestArrayOffset(x86 host)(2)");
+   }
 
    /* Compute off into a reg, %off.  Then return:
 
@@ -584,10 +592,8 @@ X86AMode* genGuestArrayOffset ( ISelEnv* env, IRArray* descr,
    }
    addInstr(env, 
             X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(7), tmp));
-   vassert(elemSz == 1 || elemSz == 8);
    return
-      X86AMode_IRRS( descr->base, hregX86_EBP(), tmp,
-                                  elemSz==8 ? 3 : 0);
+      X86AMode_IRRS( descr->base, hregX86_EBP(), tmp, shift );
 }
 
 
@@ -1159,6 +1165,11 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
          addInstr(env, X86Instr_LoadEX( 1, False, am, dst ));
          return dst;
       }
+      if (ty == Ity_I32) {
+         vassert(0); /* awaiting test case */
+         addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Mem(am), dst));
+         return dst;
+      }
       break;
    }
 
@@ -3363,6 +3374,12 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
          addInstr(env, X86Instr_Store( 1, r, am ));
          return;
       }
+      if (ty == Ity_I32) {
+         HReg r = iselIntExpr_R(env, stmt->Ist.PutI.data);
+         vassert(0); /* awaiting test case */
+         addInstr(env, X86Instr_Alu32M( Xalu_MOV, X86RI_Reg(r), am ));
+         return;
+      }
       if (ty == Ity_I64) {
          HReg rHi, rLo;
          X86AMode* am4 = advance4(am);