drm/imx: dc: Sort bits and bitfields in descending order

Consistently sort bits and bitfields from highest to lowest bits.
No functional change.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Liu Ying <victor.liu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Link: https://lore.kernel.org/r/20251014114148.43922-1-marek.vasut@mailbox.org

diff --git a/drivers/gpu/drm/imx/dc/dc-ed.c b/drivers/gpu/drm/imx/dc/dc-ed.c
index 86ecc22d0a554bf3eced218df0312b513e10e179..d42f33d6f3fcc3758ddd103be5251cf6ea9b7e68 100644 (file)
--- a/drivers/gpu/drm/imx/dc/dc-ed.c
+++ b/drivers/gpu/drm/imx/dc/dc-ed.c
@@ -15,12 +15,12 @@
 #include "dc-pe.h"
 
 #define PIXENGCFG_STATIC       0x8
-#define  POWERDOWN             BIT(4)
-#define  SYNC_MODE             BIT(8)
-#define  SINGLE                        0
 #define  DIV_MASK              GENMASK(23, 16)
 #define  DIV(x)                        FIELD_PREP(DIV_MASK, (x))
 #define  DIV_RESET             0x80
+#define  SYNC_MODE             BIT(8)
+#define  SINGLE                        0
+#define  POWERDOWN             BIT(4)
 
 #define PIXENGCFG_DYNAMIC      0xc
 
@@ -28,9 +28,9 @@
 #define  SYNC_TRIGGER          BIT(0)
 
 #define STATICCONTROL          0x8
+#define  PERFCOUNTMODE         BIT(12)
 #define  KICK_MODE             BIT(8)
 #define  EXTERNAL              BIT(8)
-#define  PERFCOUNTMODE         BIT(12)
 
 #define CONTROL                        0xc
 #define  GAMMAAPPLYENABLE      BIT(0)

diff --git a/drivers/gpu/drm/imx/dc/dc-fg.c b/drivers/gpu/drm/imx/dc/dc-fg.c
index 7f6c1852bf7240b283444788aedcbcb12ff707be..28f372be92472520507dec4149541100b83cc985 100644 (file)
--- a/drivers/gpu/drm/imx/dc/dc-fg.c
+++ b/drivers/gpu/drm/imx/dc/dc-fg.c
@@ -56,9 +56,9 @@
 
 #define FGINCTRL               0x5c
 #define FGINCTRLPANIC          0x60
-#define  FGDM_MASK             GENMASK(2, 0)
-#define  ENPRIMALPHA           BIT(3)
 #define  ENSECALPHA            BIT(4)
+#define  ENPRIMALPHA           BIT(3)
+#define  FGDM_MASK             GENMASK(2, 0)
 
 #define FGCCR                  0x64
 #define  CCGREEN(x)            FIELD_PREP(GENMASK(19, 10), (x))

diff --git a/drivers/gpu/drm/imx/dc/dc-fu.c b/drivers/gpu/drm/imx/dc/dc-fu.c
index f94c591c815891468a5c2a940076963eeaa4d51c..1d8f74babef8a7139d9d4d42726426dfe437d966 100644 (file)
--- a/drivers/gpu/drm/imx/dc/dc-fu.c
+++ b/drivers/gpu/drm/imx/dc/dc-fu.c
@@ -18,11 +18,11 @@
 #define BASEADDRESSAUTOUPDATE(x)       FIELD_PREP(BASEADDRESSAUTOUPDATE_MASK, (x))
 
 /* BURSTBUFFERMANAGEMENT */
+#define LINEMODE_MASK                  BIT(31)
 #define SETBURSTLENGTH_MASK            GENMASK(12, 8)
 #define SETBURSTLENGTH(x)              FIELD_PREP(SETBURSTLENGTH_MASK, (x))
 #define SETNUMBUFFERS_MASK             GENMASK(7, 0)
 #define SETNUMBUFFERS(x)               FIELD_PREP(SETNUMBUFFERS_MASK, (x))
-#define LINEMODE_MASK                  BIT(31)
 
 /* SOURCEBUFFERATTRIBUTES */
 #define BITSPERPIXEL_MASK              GENMASK(21, 16)
@@ -31,20 +31,20 @@
 #define STRIDE(x)                      FIELD_PREP(STRIDE_MASK, (x) - 1)
 
 /* SOURCEBUFFERDIMENSION */
-#define LINEWIDTH(x)                   FIELD_PREP(GENMASK(13, 0), (x))
 #define LINECOUNT(x)                   FIELD_PREP(GENMASK(29, 16), (x))
+#define LINEWIDTH(x)                   FIELD_PREP(GENMASK(13, 0), (x))
 
 /* LAYEROFFSET */
-#define LAYERXOFFSET(x)                        FIELD_PREP(GENMASK(14, 0), (x))
 #define LAYERYOFFSET(x)                        FIELD_PREP(GENMASK(30, 16), (x))
+#define LAYERXOFFSET(x)                        FIELD_PREP(GENMASK(14, 0), (x))
 
 /* CLIPWINDOWOFFSET */
-#define CLIPWINDOWXOFFSET(x)           FIELD_PREP(GENMASK(14, 0), (x))
 #define CLIPWINDOWYOFFSET(x)           FIELD_PREP(GENMASK(30, 16), (x))
+#define CLIPWINDOWXOFFSET(x)           FIELD_PREP(GENMASK(14, 0), (x))
 
 /* CLIPWINDOWDIMENSIONS */
-#define CLIPWINDOWWIDTH(x)             FIELD_PREP(GENMASK(13, 0), (x) - 1)
 #define CLIPWINDOWHEIGHT(x)            FIELD_PREP(GENMASK(29, 16), (x) - 1)
+#define CLIPWINDOWWIDTH(x)             FIELD_PREP(GENMASK(13, 0), (x) - 1)
 
 enum dc_linemode {
        /*

diff --git a/drivers/gpu/drm/imx/dc/dc-fu.h b/drivers/gpu/drm/imx/dc/dc-fu.h
index e016e1ea5b4e0471cf6627782603e72d0475c4e8..f678de3ca8c0ae8d883ae47ce6bebc33cd00815d 100644 (file)
--- a/drivers/gpu/drm/imx/dc/dc-fu.h
+++ b/drivers/gpu/drm/imx/dc/dc-fu.h
@@ -33,13 +33,13 @@
 #define A_SHIFT(x)                     FIELD_PREP_CONST(GENMASK(4, 0), (x))
 
 /* LAYERPROPERTY */
+#define SOURCEBUFFERENABLE             BIT(31)
 #define YUVCONVERSIONMODE_MASK         GENMASK(18, 17)
 #define YUVCONVERSIONMODE(x)           FIELD_PREP(YUVCONVERSIONMODE_MASK, (x))
-#define SOURCEBUFFERENABLE             BIT(31)
 
 /* FRAMEDIMENSIONS */
-#define FRAMEWIDTH(x)                  FIELD_PREP(GENMASK(13, 0), (x))
 #define FRAMEHEIGHT(x)                 FIELD_PREP(GENMASK(29, 16), (x))
+#define FRAMEWIDTH(x)                  FIELD_PREP(GENMASK(13, 0), (x))
 
 /* CONTROL */
 #define INPUTSELECT_MASK               GENMASK(4, 3)

diff --git a/drivers/gpu/drm/imx/dc/dc-lb.c b/drivers/gpu/drm/imx/dc/dc-lb.c
index 38f966625d382487e45c2e0c202e15c1417f6e65..ca1d714c8d6e654729e3c3ed5c00e74653b3e6b3 100644 (file)
--- a/drivers/gpu/drm/imx/dc/dc-lb.c
+++ b/drivers/gpu/drm/imx/dc/dc-lb.c
@@ -17,12 +17,12 @@
 #include "dc-pe.h"
 
 #define PIXENGCFG_DYNAMIC                      0x8
-#define  PIXENGCFG_DYNAMIC_PRIM_SEL_MASK       GENMASK(5, 0)
-#define  PIXENGCFG_DYNAMIC_PRIM_SEL(x)         \
-               FIELD_PREP(PIXENGCFG_DYNAMIC_PRIM_SEL_MASK, (x))
 #define  PIXENGCFG_DYNAMIC_SEC_SEL_MASK                GENMASK(13, 8)
 #define  PIXENGCFG_DYNAMIC_SEC_SEL(x)          \
                FIELD_PREP(PIXENGCFG_DYNAMIC_SEC_SEL_MASK, (x))
+#define  PIXENGCFG_DYNAMIC_PRIM_SEL_MASK       GENMASK(5, 0)
+#define  PIXENGCFG_DYNAMIC_PRIM_SEL(x)         \
+               FIELD_PREP(PIXENGCFG_DYNAMIC_PRIM_SEL_MASK, (x))
 
 #define STATICCONTROL                          0x8
 #define  SHDTOKSEL_MASK                                GENMASK(4, 3)
@@ -37,24 +37,24 @@
 #define BLENDCONTROL                           0x10
 #define  ALPHA_MASK                            GENMASK(23, 16)
 #define  ALPHA(x)                              FIELD_PREP(ALPHA_MASK, (x))
-#define  PRIM_C_BLD_FUNC_MASK                  GENMASK(2, 0)
-#define  PRIM_C_BLD_FUNC(x)                    \
-               FIELD_PREP(PRIM_C_BLD_FUNC_MASK, (x))
-#define  SEC_C_BLD_FUNC_MASK                   GENMASK(6, 4)
-#define  SEC_C_BLD_FUNC(x)                     \
-               FIELD_PREP(SEC_C_BLD_FUNC_MASK, (x))
-#define  PRIM_A_BLD_FUNC_MASK                  GENMASK(10, 8)
-#define  PRIM_A_BLD_FUNC(x)                    \
-               FIELD_PREP(PRIM_A_BLD_FUNC_MASK, (x))
 #define  SEC_A_BLD_FUNC_MASK                   GENMASK(14, 12)
 #define  SEC_A_BLD_FUNC(x)                     \
                FIELD_PREP(SEC_A_BLD_FUNC_MASK, (x))
+#define  PRIM_A_BLD_FUNC_MASK                  GENMASK(10, 8)
+#define  PRIM_A_BLD_FUNC(x)                    \
+               FIELD_PREP(PRIM_A_BLD_FUNC_MASK, (x))
+#define  SEC_C_BLD_FUNC_MASK                   GENMASK(6, 4)
+#define  SEC_C_BLD_FUNC(x)                     \
+               FIELD_PREP(SEC_C_BLD_FUNC_MASK, (x))
+#define  PRIM_C_BLD_FUNC_MASK                  GENMASK(2, 0)
+#define  PRIM_C_BLD_FUNC(x)                    \
+               FIELD_PREP(PRIM_C_BLD_FUNC_MASK, (x))
 
 #define POSITION                               0x14
-#define  XPOS_MASK                             GENMASK(15, 0)
-#define  XPOS(x)                               FIELD_PREP(XPOS_MASK, (x))
 #define  YPOS_MASK                             GENMASK(31, 16)
 #define  YPOS(x)                               FIELD_PREP(YPOS_MASK, (x))
+#define  XPOS_MASK                             GENMASK(15, 0)
+#define  XPOS(x)                               FIELD_PREP(XPOS_MASK, (x))
 
 enum dc_lb_blend_func {
        DC_LAYERBLEND_BLEND_ZERO,