riscv: dts: spacemit: add PWM support for K1 SoC

The SpacemiT K1 SoC features a PWM controller with 20 independent
channels. Add the corresponding 20 PWM nodes to the device tree.

Signed-off-by: Guodong Xu <guodong@riscstar.com>
Link: https://lore.kernel.org/r/20250429085048.1310409-4-guodong@riscstar.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>

diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi
index 4bc69bebfebfa418f0c6b7ced66ee72c288291c6..e0119d8298a0aeedd5ca37670e5f3ed652056b62 100644 (file)
--- a/arch/riscv/boot/dts/spacemit/k1.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k1.dtsi
@@ -495,6 +495,78 @@
                                      <&pinctrl 3 0 96 32>;
                };
 
+               pwm0: pwm@d401a000 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd401a000 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM0>;
+                       resets = <&syscon_apbc RESET_PWM0>;
+                       status = "disabled";
+               };
+
+               pwm1: pwm@d401a400 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd401a400 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM1>;
+                       resets = <&syscon_apbc RESET_PWM1>;
+                       status = "disabled";
+               };
+
+               pwm2: pwm@d401a800 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd401a800 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM2>;
+                       resets = <&syscon_apbc RESET_PWM2>;
+                       status = "disabled";
+               };
+
+               pwm3: pwm@d401ac00 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd401ac00 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM3>;
+                       resets = <&syscon_apbc RESET_PWM3>;
+                       status = "disabled";
+               };
+
+               pwm4: pwm@d401b000 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd401b000 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM4>;
+                       resets = <&syscon_apbc RESET_PWM4>;
+                       status = "disabled";
+               };
+
+               pwm5: pwm@d401b400 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd401b400 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM5>;
+                       resets = <&syscon_apbc RESET_PWM5>;
+                       status = "disabled";
+               };
+
+               pwm6: pwm@d401b800 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd401b800 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM6>;
+                       resets = <&syscon_apbc RESET_PWM6>;
+                       status = "disabled";
+               };
+
+               pwm7: pwm@d401bc00 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd401bc00 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM7>;
+                       resets = <&syscon_apbc RESET_PWM7>;
+                       status = "disabled";
+               };
+
                pinctrl: pinctrl@d401e000 {
                        compatible = "spacemit,k1-pinctrl";
                        reg = <0x0 0xd401e000 0x0 0x400>;
@@ -503,6 +575,114 @@
                        clock-names = "func", "bus";
                };
 
+               pwm8: pwm@d4020000 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4020000 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM8>;
+                       resets = <&syscon_apbc RESET_PWM8>;
+                       status = "disabled";
+               };
+
+               pwm9: pwm@d4020400 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4020400 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM9>;
+                       resets = <&syscon_apbc RESET_PWM9>;
+                       status = "disabled";
+               };
+
+               pwm10: pwm@d4020800 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4020800 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM10>;
+                       resets = <&syscon_apbc RESET_PWM10>;
+                       status = "disabled";
+               };
+
+               pwm11: pwm@d4020c00 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4020c00 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM11>;
+                       resets = <&syscon_apbc RESET_PWM11>;
+                       status = "disabled";
+               };
+
+               pwm12: pwm@d4021000 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4021000 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM12>;
+                       resets = <&syscon_apbc RESET_PWM12>;
+                       status = "disabled";
+               };
+
+               pwm13: pwm@d4021400 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4021400 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM13>;
+                       resets = <&syscon_apbc RESET_PWM13>;
+                       status = "disabled";
+               };
+
+               pwm14: pwm@d4021800 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4021800 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM14>;
+                       resets = <&syscon_apbc RESET_PWM14>;
+                       status = "disabled";
+               };
+
+               pwm15: pwm@d4021c00 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4021c00 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM15>;
+                       resets = <&syscon_apbc RESET_PWM15>;
+                       status = "disabled";
+               };
+
+               pwm16: pwm@d4022000 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4022000 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM16>;
+                       resets = <&syscon_apbc RESET_PWM16>;
+                       status = "disabled";
+               };
+
+               pwm17: pwm@d4022400 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4022400 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM17>;
+                       resets = <&syscon_apbc RESET_PWM17>;
+                       status = "disabled";
+               };
+
+               pwm18: pwm@d4022800 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4022800 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM18>;
+                       resets = <&syscon_apbc RESET_PWM18>;
+                       status = "disabled";
+               };
+
+               pwm19: pwm@d4022c00 {
+                       compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm";
+                       reg = <0x0 0xd4022c00 0x0 0x10>;
+                       #pwm-cells = <3>;
+                       clocks = <&syscon_apbc CLK_PWM19>;
+                       resets = <&syscon_apbc RESET_PWM19>;
+                       status = "disabled";
+               };
+
                syscon_mpmu: system-controller@d4050000 {
                        compatible = "spacemit,k1-syscon-mpmu";
                        reg = <0x0 0xd4050000 0x0 0x209c>;