priv->pps[].available is set in stmmac_ptp_register() for all PPS
outputs reported by hardware up to STMMAC_PPS_MAX.
Since we now set priv->ptp_clock_ops.n_per_out to the number of PPS
outputs that both the hardware and driver can support to prevent
array overflow in stmmac_enable(), this makes priv->pps[].available
redundant. Remove this struct member.
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1vypHc-0000000CSbl-1X6v@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
u32 val = readl(ioaddr + MAC_PPS_CONTROL);
u64 period;
- if (!cfg->available)
- return -EINVAL;
if (tnsec & TRGTBUSY0)
return -EBUSY;
if (!sub_second_inc || !systime_flags)
u32 val = readl(ioaddr + XGMAC_PPS_CONTROL);
u64 period;
- if (!cfg->available)
- return -EINVAL;
if (tnsec & XGMAC_TRGTBUSY0)
return -EBUSY;
if (!sub_second_inc || !systime_flags)
#define STMMAC_PPS_MAX 4
struct stmmac_pps_cfg {
- bool available;
struct timespec64 start;
struct timespec64 period;
};
{
unsigned int pps_out_num = priv->dma_cap.pps_out_num;
unsigned int n_ext_ts;
- int i;
if (pps_out_num > STMMAC_PPS_MAX) {
dev_warn(priv->device,
pps_out_num = STMMAC_PPS_MAX;
}
- for (i = 0; i < pps_out_num; i++)
- priv->pps[i].available = true;
-
/* Calculate the clock domain crossing (CDC) error if necessary */
priv->plat->cdc_error_adj = 0;
if (priv->plat->core_type == DWMAC_CORE_GMAC4)