KVM: SVM: Emulate PERF_CNTR_GLOBAL_STATUS_SET for PerfMonV2

Emulate PERF_CNTR_GLOBAL_STATUS_SET when PerfMonV2 is enumerated to the
guest, as the MSR is supposed to exist in all AMD v2 PMUs.

Fixes: 4a2771895ca6 ("KVM: x86/svm/pmu: Add AMD PerfMonV2 support")
Cc: stable@vger.kernel.org
Cc: Sandipan Das <sandipan.das@amd.com>
Link: https://lore.kernel.org/r/20250711172746.1579423-1-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index b65c3ba5fa1410bb7a9a3774fd964d0d7ea9ab5d..20fa4a79df1378dd7bb1db8f6318c8dd465261e6 100644 (file)
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -733,6 +733,7 @@
 #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS      0xc0000300
 #define MSR_AMD64_PERF_CNTR_GLOBAL_CTL         0xc0000301
 #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR  0xc0000302
+#define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_SET  0xc0000303
 
 /* AMD Hardware Feedback Support MSRs */
 #define MSR_AMD_WORKLOAD_CLASS_CONFIG          0xc0000500

diff --git a/arch/x86/kvm/pmu.c b/arch/x86/kvm/pmu.c
index 75e9cfc689f8953de65a5a2503597531bef0dd8e..a84fb3d28885b171f0afb0f0dce3a3b2ebf7b930 100644 (file)
--- a/arch/x86/kvm/pmu.c
+++ b/arch/x86/kvm/pmu.c
@@ -650,6 +650,7 @@ int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
                msr_info->data = pmu->global_ctrl;
                break;
        case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR:
+       case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_SET:
        case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
                msr_info->data = 0;
                break;
@@ -711,6 +712,10 @@ int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
                if (!msr_info->host_initiated)
                        pmu->global_status &= ~data;
                break;
+       case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_SET:
+               if (!msr_info->host_initiated)
+                       pmu->global_status |= data & ~pmu->global_status_rsvd;
+               break;
        default:
                kvm_pmu_mark_pmc_in_use(vcpu, msr_info->index);
                return kvm_pmu_call(set_msr)(vcpu, msr_info);

diff --git a/arch/x86/kvm/svm/pmu.c b/arch/x86/kvm/svm/pmu.c
index 288f7f2a46f233e15ecfcea6dd15bcb769232996..aa4379e46e969d9d1620c7985a8a78a836f61050 100644 (file)
--- a/arch/x86/kvm/svm/pmu.c
+++ b/arch/x86/kvm/svm/pmu.c
@@ -113,6 +113,7 @@ static bool amd_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)
        case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS:
        case MSR_AMD64_PERF_CNTR_GLOBAL_CTL:
        case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR:
+       case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_SET:
                return pmu->version > 1;
        default:
                if (msr > MSR_F15H_PERF_CTR5 &&

diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 79057622fa760d2af94900a81d4c0dcec01726ce..5dc32f2fe391922c9815e007b844ed64c066c682 100644 (file)
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -367,6 +367,7 @@ static const u32 msrs_to_save_pmu[] = {
        MSR_AMD64_PERF_CNTR_GLOBAL_CTL,
        MSR_AMD64_PERF_CNTR_GLOBAL_STATUS,
        MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR,
+       MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_SET,
 };
 
 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_base) +
@@ -7353,6 +7354,7 @@ static void kvm_probe_msr_to_save(u32 msr_index)
        case MSR_AMD64_PERF_CNTR_GLOBAL_CTL:
        case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS:
        case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR:
+       case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_SET:
                if (!kvm_cpu_cap_has(X86_FEATURE_PERFMON_V2))
                        return;
                break;