is_padlock_nano is behaving properly and saving registers.

diff --git a/lib/accelerated/x86/asm/padlock-common.s b/lib/accelerated/x86/asm/padlock-common.s
index bd9123e9539ad133f4b1f94a58466d6e789617cc..f61eb27c5ceaaa88bbd14b09a5d11838fa89c8cd 100644 (file)
--- a/lib/accelerated/x86/asm/padlock-common.s
+++ b/lib/accelerated/x86/asm/padlock-common.s
@@ -25,6 +25,7 @@
 .type  is_padlock_nano,@function
 .align 16
 is_padlock_nano:
+       pusha
        xorl    %eax,%eax
        cpuid
        movl    $1,%eax
@@ -32,9 +33,11 @@ is_padlock_nano:
        or      $0x000f,%eax
         cmp     $0x06ff,%eax
        jne     .Lno_nano
+       popa
        mov     $1,%eax
         ret
 .Lno_nano:
+       popa
        xorl    %eax,%eax
         ret
 .size  is_padlock_nano,.-is_padlock_nano