sunxi: dt: apply IPFire changes for orangepi zero

change led trigger
enable all usb
lower shared mem to 8MB

Signed-off-by: Arne Fitzenreiter <arne_f@ipfire.org>

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index 4120437a1df75a5a2090d22881de089205160613..7a871eef0e9d1b845be9757025ca12fd3ac9effc 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -72,12 +72,14 @@
                pwr_led {
                        label = "orangepi:green:pwr";
                        gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
-                       default-state = "on";
+                       linux,default-trigger = "heartbeat";
                };
 
                status_led {
                        label = "orangepi:red:status";
                        gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
+                       linux,default-trigger = "mmc0";
+
                };
        };
 
@@ -111,6 +113,15 @@
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
                post-power-on-delay-ms = <200>;
        };
+
+       // lower the cma shared mem pool from 64 to 8MB
+       // we use no mali
+       reserved-memory {
+               cma: linux,cma {
+                       size = <0x800000>;
+               };
+       };
+
 };
 
 &cpu0 {
@@ -125,6 +136,14 @@
        status = "okay";
 };
 
+&ehci2 {
+       status = "okay";
+};
+
+&ehci3 {
+       status = "okay";
+};
+
 &emac {
        phy-handle = <&int_mii_phy>;
        phy-mode = "mii";
@@ -167,6 +186,14 @@
        status = "okay";
 };
 
+&ohci2 {
+       status = "okay";
+};
+
+&ohci3 {
+       status = "okay";
+};
+
 &spi0 {
        /* Disable SPI NOR by default: it optional on Orange Pi Zero boards */
        status = "disabled";