]> git.ipfire.org Git - thirdparty/valgrind.git/commitdiff
Add a couple more %rflag-helper specialisations.
authorJulian Seward <jseward@acm.org>
Wed, 11 May 2005 23:16:43 +0000 (23:16 +0000)
committerJulian Seward <jseward@acm.org>
Wed, 11 May 2005 23:16:43 +0000 (23:16 +0000)
git-svn-id: svn://svn.valgrind.org/vex/trunk@1191

VEX/priv/guest-amd64/ghelpers.c

index 88bef6577bbbece0a9fa3bb2f0f912d2ff97e43d..5b830b92c3d8035b5044358eb82f640e87c3022c 100644 (file)
@@ -875,24 +875,26 @@ IRExpr* guest_amd64_spechelper ( HChar* function_name,
       cc_dep1 = args[2];
       cc_dep2 = args[3];
 
-//..       /*---------------- ADDL ----------------*/
-//.. 
-//..       if (isU32(cc_op, AMD64G_CC_OP_ADDL) && isU32(cond, X86CondZ)) {
-//..          /* long add, then Z --> test (dst+src == 0) */
-//..          return unop(Iop_1Uto32,
-//..                      binop(Iop_CmpEQ32
-//..                            binop(Iop_Add32, cc_dep1, cc_dep2),
-//..                            mkU32(0)));
-//..       }
+      /*---------------- ADDQ ----------------*/
+
+      if (isU64(cc_op, AMD64G_CC_OP_ADDQ) && isU64(cond, AMD64CondZ)) {
+         /* long long add, then Z --> test (dst+src == 0) */
+         return unop(Iop_1Uto64,
+                     binop(Iop_CmpEQ64
+                           binop(Iop_Add64, cc_dep1, cc_dep2),
+                           mkU64(0)));
+      }
 
       /*---------------- SUBL ----------------*/
 
-//..       if (isU32(cc_op, AMD64G_CC_OP_SUBL) && isU32(cond, X86CondZ)) {
-//..          /* long sub/cmp, then Z --> test dst==src */
-//..          return unop(Iop_1Uto32,
-//..                      binop(Iop_CmpEQ32, cc_dep1, cc_dep2));
-//..       }
-//.. 
+      if (isU64(cc_op, AMD64G_CC_OP_SUBL) && isU64(cond, AMD64CondZ)) {
+         /* long sub/cmp, then Z --> test dst==src */
+         return unop(Iop_1Uto64,
+                     binop(Iop_CmpEQ32, 
+                           unop(Iop_64to32,cc_dep1), 
+                           unop(Iop_64to32,cc_dep2)));
+      }
+
 //..       if (isU32(cc_op, AMD64G_CC_OP_SUBL) && isU32(cond, X86CondNZ)) {
 //..          /* long sub/cmp, then NZ --> test dst!=src */
 //..          return unop(Iop_1Uto32,