--- /dev/null
+From 5ce6861d36ed5207aff9e5eead4c7cc38a986586 Mon Sep 17 00:00:00 2001
+From: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
+Date: Thu, 5 Nov 2020 17:18:42 -0800
+Subject: drm/i915: Correctly set SFC capability for video engines
+
+From: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
+
+commit 5ce6861d36ed5207aff9e5eead4c7cc38a986586 upstream.
+
+SFC capability of video engines is not set correctly because i915
+is testing for incorrect bits.
+
+Fixes: c5d3e39caa45 ("drm/i915: Engine discovery query")
+Cc: Matt Roper <matthew.d.roper@intel.com>
+Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Signed-off-by: Venkata Sandeep Dhanalakota <venkata.s.dhanalakota@intel.com>
+Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
+Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Cc: <stable@vger.kernel.org> # v5.3+
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Link: https://patchwork.freedesktop.org/patch/msgid/20201106011842.36203-1-daniele.ceraolospurio@intel.com
+(cherry picked from commit ad18fa0f5f052046cad96fee762b5c64f42dd86a)
+Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/i915/gt/intel_engine_cs.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
++++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+@@ -354,7 +354,8 @@ static void __setup_engine_capabilities(
+ * instances.
+ */
+ if ((INTEL_GEN(i915) >= 11 &&
+- RUNTIME_INFO(i915)->vdbox_sfc_access & engine->mask) ||
++ (RUNTIME_INFO(i915)->vdbox_sfc_access &
++ BIT(engine->instance))) ||
+ (INTEL_GEN(i915) >= 9 && engine->instance == 0))
+ engine->uabi_capabilities |=
+ I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC;