xtensa: Remove '*splice_bits' insn pattern

This patch reverts the previous commit "xtensa: Optimize bitwise splicing
operation" (e3a4bd0bbdccdde0cff85f93064b01a44fb10d2a).

In recent versions of gcc, expressions like '(A & M) | (B & ~M)' are
transformed into '((A ^ B) & M) ^ B' by GIMPLE simplification, so the
existence of that MD pattern is no longer relevant.

gcc/ChangeLog:

	* config/xtensa/xtensa.md (*splice_bits):
	Remove.

diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index f22191a61e471d39a5e664ff9eaf9dc90ec10b1e..8354ab250a15c248067e06e96a25442463db7384 100644 (file)
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -869,53 +869,6 @@
    (set_attr "mode"    "SI")
    (set_attr "length"  "3")])
 
-(define_insn_and_split "*splice_bits"
-  [(set (match_operand:SI 0 "register_operand" "=a")
-       (ior:SI (and:SI (match_operand:SI 1 "register_operand" "r")
-                       (match_operand:SI 3 "const_int_operand" ""))
-               (and:SI (match_operand:SI 2 "register_operand" "r")
-                       (match_operand:SI 4 "const_int_operand" ""))))]
-
-  "!optimize_debug && optimize
-   && INTVAL (operands[3]) + INTVAL (operands[4]) == -1
-   && (exact_log2 (INTVAL (operands[3]) + 1) > 16
-       || exact_log2 (INTVAL (operands[4]) + 1) > 16)"
-  "#"
-  "&& can_create_pseudo_p ()"
-  [(set (match_dup 5)
-       (ashift:SI (match_dup 1)
-                  (match_dup 4)))
-   (set (match_dup 6)
-       (lshiftrt:SI (match_dup 2)
-                    (match_dup 3)))
-   (set (match_dup 0)
-       (ior:SI (lshiftrt:SI (match_dup 5)
-                            (match_dup 4))
-               (ashift:SI (match_dup 6)
-                          (match_dup 3))))]
-{
-  int shift;
-  if (INTVAL (operands[3]) < 0)
-    {
-      rtx x;
-      x = operands[1], operands[1] = operands[2], operands[2] = x;
-      x = operands[3], operands[3] = operands[4], operands[4] = x;
-    }
-  shift = floor_log2 (INTVAL (operands[3]) + 1);
-  operands[3] = GEN_INT (shift);
-  operands[4] = GEN_INT (32 - shift);
-  operands[5] = gen_reg_rtx (SImode);
-  operands[6] = gen_reg_rtx (SImode);
-}
-  [(set_attr "type"    "arith")
-   (set_attr "mode"    "SI")
-   (set (attr "length")
-       (if_then_else (match_test "TARGET_DENSITY
-                                  && (INTVAL (operands[3]) == 0x7FFFFFFF
-                                      || INTVAL (operands[4]) == 0x7FFFFFFF)")
-                     (const_int 11)
-                     (const_int 12)))])
-
 \f
 ;; Zero-extend instructions.