arm64: dts: qcom: sc8180x: Add default GIC address cells

Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  sc8180x.dtsi:1743.4-1746.30: Warning (interrupt_map): /soc@0/pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-5-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 70c87c79e1325f4ab4c81f34e99c0b52be4b3810..87aa5a91fbcd018296df9b924b03c183c42ee729 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -3723,6 +3723,7 @@
                intc: interrupt-controller@17a00000 {
                        compatible = "arm,gic-v3";
                        interrupt-controller;
+                       #address-cells = <0>;
                        #interrupt-cells = <3>;
                        reg = <0x0 0x17a00000 0x0 0x10000>,     /* GICD */
                              <0x0 0x17a60000 0x0 0x100000>;    /* GICR * 8 */