FLAG( 820, 3, ECX, 5, 1, L3_CACHE_RMT_SLOW_BW_FILL, NO, 0 ) \
FLAG( 820, 3, ECX, 6, 1, L3_CACHE_BW_VIC, NO, 0 )
-#define CPUID_821_EAX_5 \
-FLAG( 821, 0, EAX, 5, 1, CPUID_821_RSVD1, NO, 0 )
-#define CPUID_821_EAX_23 \
-FLAG( 821, 0, EAX, 23, 1, CPUID_821_RSVD2, NO, 0 )
#define CPUID_821_EAX_26 \
-FLAG( 821, 0, EAX, 26, 1, CPUID_821_RSVD3, NO, 0 )
-#define CPUID_821_ECX_1 \
-FLAG( 821, 0, ECX, 1, 1, CPUID_821_RSVD4, NO, 0 )
-#define CPUID_821_ECX_2 \
-FLAG( 821, 0, ECX, 2, 1, CPUID_821_RSVD5, NO, 0 )
+FLAG( 821, 0, EAX, 26, 1, CPUID_821_RSVD1, NO, 0 )
#define CPUID_821_ECX_7 \
-FLAG( 821, 0, ECX, 7, 1, CPUID_821_RSVD6, NO, 0 )
+FLAG( 821, 0, ECX, 7, 1, CPUID_821_RSVD2, NO, 0 )
/* LEVEL, SUB-LEVEL, REG, POS, SIZE, NAME, MON SUPP, HWV */
#define CPUID_FIELD_DATA_LEVEL_821 \
FLAG( 821, 0, EAX, 1, 1, NON_SERIALIZING_FSGSBASE, NO, 0 ) \
FLAG( 821, 0, EAX, 2, 1, ALWAYS_SERIALIZING_LFENCE, YES, 19 ) \
FLAG( 821, 0, EAX, 3, 1, SMM_PGCFG_LOCK, NO, 0 ) \
-CPUID_821_EAX_5 \
+FLAG( 821, 0, EAX, 5, 1, VERW_CLEAR, ANY, 17 ) \
FLAG( 821, 0, EAX, 6, 1, NULL_SELECTOR_CLEARS_BASE, NO, 0 ) \
FLAG( 821, 0, EAX, 7, 1, UPPER_ADDRESS_IGNORE, YES, 20 ) \
FLAG( 821, 0, EAX, 8, 1, AUTOMATIC_IBRS, YES, 20 ) \
FLAG( 821, 0, EAX, 18, 1, EPSF, NO, 0 ) \
FLAG( 821, 0, EAX, 19, 1, FAST_REP_SCASB, YES, 22 ) \
FLAG( 821, 0, EAX, 20, 1, LEAF821_PREFETCHI, YES, 22 ) \
-CPUID_821_EAX_23 \
+FLAG( 821, 0, EAX, 23, 1, AVX512_BMM, NO, 0 ) \
FLAG( 821, 0, EAX, 24, 1, ERAPS, YES, FUT )\
CPUID_821_EAX_26 \
FIELD(821, 0, EBX, 0, 12, MICROCODE_PATCH_SIZE, NO, 0 ) \
FIELD(821, 0, EBX, 16, 8, RAP_SIZE, NO, 0 ) \
-CPUID_821_ECX_1 \
-CPUID_821_ECX_2 \
+FLAG( 821, 0, ECX, 1, 1, TSA_SQ_NO, YES, FUT ) \
+FLAG( 821, 0, ECX, 2, 1, TSA_L1_NO, YES, FUT ) \
CPUID_821_ECX_7
/* LEVEL, SUB-LEVEL, REG, POS, SIZE, NAME, MON SUPP, HWV */