can: rcar_canfd: Fix CAN-FD mode as default

The commit 5cff263606a1 ("can: rcar_canfd: Fix controller mode setting")
has aligned with the flow mentioned in the hardware manual for all SoCs
except R-Car Gen3 and RZ/G2L SoCs. On R-Car Gen4 and RZ/G3E SoCs, due to
the wrong logic in the commit[1] sets the default mode to FD-Only mode
instead of CAN-FD mode.

This patch sets the CAN-FD mode as the default for all SoCs by dropping
the rcar_canfd_set_mode() as some SoC requires mode setting in global
reset mode, and the rest of the SoCs in channel reset mode and update the
rcar_canfd_reset_controller() to take care of these constraints. Moreover,
the RZ/G3E and R-Car Gen4 SoCs support 3 modes compared to 2 modes on the
R-Car Gen3. Use inverted logic in rcar_canfd_reset_controller() to
simplify the code later to support FD-only mode.

[1]
commit 45721c406dcf ("can: rcar_canfd: Add support for r8a779a0 SoC")

Fixes: 5cff263606a1 ("can: rcar_canfd: Fix controller mode setting")
Cc: stable@vger.kernel.org
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://patch.msgid.link/20251118123926.193445-1-biju.das.jz@bp.renesas.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>

diff --git a/drivers/net/can/rcar/rcar_canfd.c b/drivers/net/can/rcar/rcar_canfd.c
index 45d36adb51b782e35f315be1b8458bdf2eb2b52f..4c0d7d26df9f3a1f834ec2ec2c0b864ad30e537b 100644 (file)
--- a/drivers/net/can/rcar/rcar_canfd.c
+++ b/drivers/net/can/rcar/rcar_canfd.c
@@ -709,6 +709,11 @@ static void rcar_canfd_set_bit_reg(void __iomem *addr, u32 val)
        rcar_canfd_update(val, val, addr);
 }
 
+static void rcar_canfd_clear_bit_reg(void __iomem *addr, u32 val)
+{
+       rcar_canfd_update(val, 0, addr);
+}
+
 static void rcar_canfd_update_bit_reg(void __iomem *addr, u32 mask, u32 val)
 {
        rcar_canfd_update(mask, val, addr);
@@ -755,25 +760,6 @@ static void rcar_canfd_set_rnc(struct rcar_canfd_global *gpriv, unsigned int ch,
        rcar_canfd_set_bit(gpriv->base, RCANFD_GAFLCFG(w), rnc);
 }
 
-static void rcar_canfd_set_mode(struct rcar_canfd_global *gpriv)
-{
-       if (gpriv->info->ch_interface_mode) {
-               u32 ch, val = gpriv->fdmode ? RCANFD_GEN4_FDCFG_FDOE
-                                           : RCANFD_GEN4_FDCFG_CLOE;
-
-               for_each_set_bit(ch, &gpriv->channels_mask,
-                                gpriv->info->max_channels)
-                       rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg, val);
-       } else {
-               if (gpriv->fdmode)
-                       rcar_canfd_set_bit(gpriv->base, RCANFD_GRMCFG,
-                                          RCANFD_GRMCFG_RCMC);
-               else
-                       rcar_canfd_clear_bit(gpriv->base, RCANFD_GRMCFG,
-                                            RCANFD_GRMCFG_RCMC);
-       }
-}
-
 static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)
 {
        struct device *dev = &gpriv->pdev->dev;
@@ -806,6 +792,16 @@ static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)
        /* Reset Global error flags */
        rcar_canfd_write(gpriv->base, RCANFD_GERFL, 0x0);
 
+       /* Set the controller into appropriate mode */
+       if (!gpriv->info->ch_interface_mode) {
+               if (gpriv->fdmode)
+                       rcar_canfd_set_bit(gpriv->base, RCANFD_GRMCFG,
+                                          RCANFD_GRMCFG_RCMC);
+               else
+                       rcar_canfd_clear_bit(gpriv->base, RCANFD_GRMCFG,
+                                            RCANFD_GRMCFG_RCMC);
+       }
+
        /* Transition all Channels to reset mode */
        for_each_set_bit(ch, &gpriv->channels_mask, gpriv->info->max_channels) {
                rcar_canfd_clear_bit(gpriv->base,
@@ -823,10 +819,23 @@ static int rcar_canfd_reset_controller(struct rcar_canfd_global *gpriv)
                        dev_dbg(dev, "channel %u reset failed\n", ch);
                        return err;
                }
-       }
 
-       /* Set the controller into appropriate mode */
-       rcar_canfd_set_mode(gpriv);
+               /* Set the controller into appropriate mode */
+               if (gpriv->info->ch_interface_mode) {
+                       /* Do not set CLOE and FDOE simultaneously */
+                       if (!gpriv->fdmode) {
+                               rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
+                                                        RCANFD_GEN4_FDCFG_FDOE);
+                               rcar_canfd_set_bit_reg(&gpriv->fcbase[ch].cfdcfg,
+                                                      RCANFD_GEN4_FDCFG_CLOE);
+                       } else {
+                               rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
+                                                        RCANFD_GEN4_FDCFG_FDOE);
+                               rcar_canfd_clear_bit_reg(&gpriv->fcbase[ch].cfdcfg,
+                                                        RCANFD_GEN4_FDCFG_CLOE);
+                       }
+               }
+       }
 
        return 0;
 }