re PR rtl-optimization/59915 (LRA ICE - Repeated looping over subreg reloads (gcc...

2014-01-23  Vladimir Makarov  <vmakarov@redhat.com>

	PR regression/59915
	* lra-constraints.c (simplify_operand_subreg): Spill pseudo if
	there is a danger of looping.

From-SVN: r207007

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2998c727844a09e3aba976111d6264c9bd34f7bd..874352c08a83f2a35b5ebcbfcf4adfa1af3d5d64 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2014-01-23  Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR regression/59915
+       * lra-constraints.c (simplify_operand_subreg): Spill pseudo if
+       there is a danger of looping.
+
 2014-01-23  Pat Haugen  <pthaugen@us.ibm.com>
 
        * config/rs6000/rs6000.c (rs6000_option_override_internal): Don't

diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 7454229a7d6b07ed1a73629de45e6a76157be647..34159f75a10f1ef87e42f0d5f21361dd92e9ba6a 100644 (file)
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -1291,9 +1291,20 @@ simplify_operand_subreg (int nop, enum machine_mode reg_mode)
        && ! LRA_SUBREG_P (operand))
       || CONSTANT_P (reg) || GET_CODE (reg) == PLUS || MEM_P (reg))
     {
-      /* The class will be defined later in curr_insn_transform.  */
-      enum reg_class rclass
-       = (enum reg_class) targetm.preferred_reload_class (reg, ALL_REGS);
+      enum reg_class rclass;
+
+      if (REG_P (reg)
+         && curr_insn_set != NULL_RTX
+         && (REG_P (SET_SRC (curr_insn_set))
+             || GET_CODE (SET_SRC (curr_insn_set)) == SUBREG))
+       /* There is big probability that we will get the same class
+          for the new pseudo and we will get the same insn which
+          means infinite looping.  So spill the new pseudo.  */
+       rclass = NO_REGS;
+      else
+       /* The class will be defined later in curr_insn_transform.  */
+       rclass
+         = (enum reg_class) targetm.preferred_reload_class (reg, ALL_REGS);
 
       if (get_reload_reg (curr_static_id->operand[nop].type, reg_mode, reg,
                          rclass, "subreg reg", &new_reg))