drm/xe: derive mem copy capability from graphics version

Drop .has_mem_copy_instr from the platform descriptors and set it
in xe_info_init() after handle_gmdid() populates graphics_verx100.
Centralizing the GRAPHICS_VER(xe) >= 20 check keeps MEM_COPY enabled
on Xe2+ and removes redundant per-platform plumbing.

Bspec: 57561

Fixes: 1e12dbae9d72 ("drm/xe/migrate: support MEM_COPY instruction")
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Suggested-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
Link: https://patch.msgid.link/20260120054724.1982608-2-nitin.r.gote@intel.com
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index f367479fe3fb0c7fc28469ee51f73f221b328721..ed661bc54c31d7a3a801cc9b03be3bdda51c5a33 100644 (file)
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -350,7 +350,6 @@ static const struct xe_device_desc lnl_desc = {
        .has_display = true,
        .has_flat_ccs = 1,
        .has_pxp = true,
-       .has_mem_copy_instr = true,
        .max_gt_per_tile = 2,
        .needs_scratch = true,
        .va_bits = 48,
@@ -375,7 +374,6 @@ static const struct xe_device_desc bmg_desc = {
        .has_pre_prod_wa = 1,
        .has_soc_remapper_telem = true,
        .has_sriov = true,
-       .has_mem_copy_instr = true,
        .max_gt_per_tile = 2,
        .needs_scratch = true,
        .subplatforms = (const struct xe_subplatform_desc[]) {
@@ -392,7 +390,6 @@ static const struct xe_device_desc ptl_desc = {
        .has_display = true,
        .has_flat_ccs = 1,
        .has_sriov = true,
-       .has_mem_copy_instr = true,
        .has_pre_prod_wa = 1,
        .has_pxp = true,
        .max_gt_per_tile = 2,
@@ -407,7 +404,6 @@ static const struct xe_device_desc nvls_desc = {
        .dma_mask_size = 46,
        .has_display = true,
        .has_flat_ccs = 1,
-       .has_mem_copy_instr = true,
        .has_pre_prod_wa = 1,
        .max_gt_per_tile = 2,
        .require_force_probe = true,
@@ -705,7 +701,6 @@ static int xe_info_init_early(struct xe_device *xe,
        xe->info.has_soc_remapper_telem = desc->has_soc_remapper_telem;
        xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
                desc->has_sriov;
-       xe->info.has_mem_copy_instr = desc->has_mem_copy_instr;
        xe->info.skip_guc_pc = desc->skip_guc_pc;
        xe->info.skip_mtcfg = desc->skip_mtcfg;
        xe->info.skip_pcode = desc->skip_pcode;
@@ -896,6 +891,7 @@ static int xe_info_init(struct xe_device *xe,
        xe->info.has_ctx_tlb_inval = graphics_desc->has_ctx_tlb_inval;
        xe->info.has_usm = graphics_desc->has_usm;
        xe->info.has_64bit_timestamp = graphics_desc->has_64bit_timestamp;
+       xe->info.has_mem_copy_instr = GRAPHICS_VER(xe) >= 20;
 
        xe_info_probe_tile_count(xe);
 

diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 7ccb0ab7a53bf8cac6c5ac80716c30a384645fc4..8b2ff3f25607eddf31829860cf1c14eb08043837 100644 (file)
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -49,7 +49,6 @@ struct xe_device_desc {
        u8 has_llc:1;
        u8 has_mbx_power_limits:1;
        u8 has_mbx_thermal_info:1;
-       u8 has_mem_copy_instr:1;
        u8 has_mert:1;
        u8 has_pre_prod_wa:1;
        u8 has_page_reclaim_hw_assist:1;