]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: renesas: r9a09g077m44-rzt2h-evk: Enable I2C0 and I2C1 support
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tue, 12 Aug 2025 20:03:39 +0000 (21:03 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 19 Aug 2025 09:42:58 +0000 (11:42 +0200)
Enable I2C0 and I2C1 on the RZ/T2H evaluation board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250812200344.3253781-9-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts
arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi

index 486584fefeadf9c552667f017ad4d3dea6f30bd1..51ea295b324101e80f080a20154839634fe7f88e 100644 (file)
@@ -7,6 +7,8 @@
 
 /dts-v1/;
 
+#include <dt-bindings/pinctrl/renesas,r9a09g077-pinctrl.h>
+
 #include "r9a09g077m44.dtsi"
 #include "rzt2h-n2h-evk-common.dtsi"
 
        model = "Renesas RZ/T2H EVK Board based on r9a09g077m44";
        compatible = "renesas,rzt2h-evk", "renesas,r9a09g077m44", "renesas,r9a09g077";
 };
+
+&i2c0 {
+       pinctrl-0 = <&i2c0_pins>;
+       pinctrl-names = "default";
+       clock-frequency = <400000>;
+       status = "okay";
+};
+
+&i2c1 {
+       pinctrl-0 = <&i2c1_pins>;
+       pinctrl-names = "default";
+       clock-frequency = <400000>;
+       status = "okay";
+};
+
+&pinctrl {
+       /*
+        * I2C0 Pin Configuration:
+        * ------------------------
+        * Signal | Pin     | SW6
+        * -------|---------|--------------
+        * SCL    | P23_3   | 7: ON, 8: OFF
+        * SDA    | P23_4   | 9: ON, 10: OFF
+        */
+       i2c0_pins: i2c0-pins {
+               pinmux = <RZT2H_PORT_PINMUX(23, 3, 0x17)>,
+                        <RZT2H_PORT_PINMUX(23, 4, 0x17)>;
+       };
+
+       i2c1_pins: i2c1-pins {
+               pinmux = <RZT2H_PORT_PINMUX(5, 0, 0x17)>, /* SDA */
+                        <RZT2H_PORT_PINMUX(4, 7, 0x17)>; /* SCL */
+       };
+};
index 5f17996bcd6bc6de5c9fb079862dbcadf0fe4891..263509cc3dc4c106068785499d1b0bc6b3424dbc 100644 (file)
@@ -7,6 +7,8 @@
 
 / {
        aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
                serial0 = &sci0;
        };