--- /dev/null
+From eb86b283c042831d8069fe46e8093253007210c4 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Thu, 28 May 2020 13:57:42 -0700
+Subject: PCI: Add ACS quirk for Intel Root Complex Integrated Endpoints
+
+From: Ashok Raj <ashok.raj@intel.com>
+
+[ Upstream commit 3247bd10a4502a3075ce8e1c3c7d31ef76f193ce ]
+
+All Intel platforms guarantee that all root complex implementations must
+send transactions up to IOMMU for address translations. Hence for Intel
+RCiEP devices, we can assume some ACS-type isolation even without an ACS
+capability.
+
+From the Intel VT-d spec, r3.1, sec 3.16 ("Root-Complex Peer to Peer
+Considerations"):
+
+ When DMA remapping is enabled, peer-to-peer requests through the
+ Root-Complex must be handled as follows:
+
+ - The input address in the request is translated (through first-level,
+ second-level or nested translation) to a host physical address (HPA).
+ The address decoding for peer addresses must be done only on the
+ translated HPA. Hardware implementations are free to further limit
+ peer-to-peer accesses to specific host physical address regions (or
+ to completely disallow peer-forwarding of translated requests).
+
+ - Since address translation changes the contents (address field) of
+ the PCI Express Transaction Layer Packet (TLP), for PCI Express
+ peer-to-peer requests with ECRC, the Root-Complex hardware must use
+ the new ECRC (re-computed with the translated address) if it
+ decides to forward the TLP as a peer request.
+
+ - Root-ports, and multi-function root-complex integrated endpoints, may
+ support additional peer-to-peer control features by supporting PCI
+ Express Access Control Services (ACS) capability. Refer to ACS
+ capability in PCI Express specifications for details.
+
+Since Linux didn't give special treatment to allow this exception, certain
+RCiEP MFD devices were grouped in a single IOMMU group. This doesn't permit
+a single device to be assigned to a guest for instance.
+
+In one vendor system: Device 14.x were grouped in a single IOMMU group.
+
+ /sys/kernel/iommu_groups/5/devices/0000:00:14.0
+ /sys/kernel/iommu_groups/5/devices/0000:00:14.2
+ /sys/kernel/iommu_groups/5/devices/0000:00:14.3
+
+After this patch:
+
+ /sys/kernel/iommu_groups/5/devices/0000:00:14.0
+ /sys/kernel/iommu_groups/5/devices/0000:00:14.2
+ /sys/kernel/iommu_groups/6/devices/0000:00:14.3 <<< new group
+
+14.0 and 14.2 are integrated devices, but legacy end points, whereas 14.3
+was a PCIe-compliant RCiEP.
+
+ 00:14.3 Network controller: Intel Corporation Device 9df0 (rev 30)
+ Capabilities: [40] Express (v2) Root Complex Integrated Endpoint, MSI 00
+
+This permits assigning this device to a guest VM.
+
+[bhelgaas: drop "Fixes" tag since this doesn't fix a bug in that commit]
+Link: https://lore.kernel.org/r/1590699462-7131-1-git-send-email-ashok.raj@intel.com
+Tested-by: Darrel Goeddel <dgoeddel@forcepoint.com>
+Signed-off-by: Ashok Raj <ashok.raj@intel.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Alex Williamson <alex.williamson@redhat.com>
+Cc: stable@vger.kernel.org
+Cc: Lu Baolu <baolu.lu@linux.intel.com>
+Cc: Mark Scott <mscott@forcepoint.com>,
+Cc: Romil Sharma <rsharma@forcepoint.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pci/quirks.c | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
+index d59a735927f7..a1ec8a1977d3 100644
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -4683,6 +4683,20 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags)
+ PCI_ACS_CR | PCI_ACS_UF | PCI_ACS_DT);
+ }
+
++static int pci_quirk_rciep_acs(struct pci_dev *dev, u16 acs_flags)
++{
++ /*
++ * Intel RCiEP's are required to allow p2p only on translated
++ * addresses. Refer to Intel VT-d specification, r3.1, sec 3.16,
++ * "Root-Complex Peer to Peer Considerations".
++ */
++ if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END)
++ return -ENOTTY;
++
++ return pci_acs_ctrl_enabled(acs_flags,
++ PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
++}
++
+ static int pci_quirk_brcm_acs(struct pci_dev *dev, u16 acs_flags)
+ {
+ /*
+@@ -4765,6 +4779,7 @@ static const struct pci_dev_acs_enabled {
+ /* I219 */
+ { PCI_VENDOR_ID_INTEL, 0x15b7, pci_quirk_mf_endpoint_acs },
+ { PCI_VENDOR_ID_INTEL, 0x15b8, pci_quirk_mf_endpoint_acs },
++ { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_rciep_acs },
+ /* QCOM QDF2xxx root ports */
+ { PCI_VENDOR_ID_QCOM, 0x0400, pci_quirk_qcom_rp_acs },
+ { PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs },
+--
+2.25.1
+
--- /dev/null
+From 046a5d5bf2211132a750decbbe55f908ee9a0807 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 10 Mar 2020 20:50:07 +0800
+Subject: PCI: Add Loongson vendor ID
+
+From: Tiezhu Yang <yangtiezhu@loongson.cn>
+
+[ Upstream commit 9acb9fe18d863aacc99948963f8d5d447dc311be ]
+
+Add the Loongson vendor ID to pci_ids.h to be used by the controller
+driver in the future.
+
+The Loongson vendor ID can be found at the following link:
+https://git.kernel.org/pub/scm/utils/pciutils/pciutils.git/tree/pci.ids
+
+Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
+Signed-off-by: Jens Axboe <axboe@kernel.dk>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ include/linux/pci_ids.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
+index 6693cf561cd1..1dfc4e1dcb94 100644
+--- a/include/linux/pci_ids.h
++++ b/include/linux/pci_ids.h
+@@ -148,6 +148,8 @@
+
+ /* Vendors and devices. Sort key: vendor first, device next. */
+
++#define PCI_VENDOR_ID_LOONGSON 0x0014
++
+ #define PCI_VENDOR_ID_TTTECH 0x0357
+ #define PCI_DEVICE_ID_TTTECH_MC322 0x000a
+
+--
+2.25.1
+
--- /dev/null
+From 17ae592d1d80bf98244b3456dc28a0a6fa76dfd5 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 20 May 2020 18:23:30 -0500
+Subject: PCI: Avoid FLR for AMD Matisse HD Audio & USB 3.0
+
+From: Marcos Scriven <marcos@scriven.org>
+
+[ Upstream commit 0d14f06cd6657ba3446a5eb780672da487b068e7 ]
+
+The AMD Matisse HD Audio & USB 3.0 devices advertise Function Level Reset
+support, but hang when an FLR is triggered.
+
+To reproduce the problem, attach the device to a VM, then detach and try to
+attach again.
+
+Rename the existing quirk_intel_no_flr(), which was not Intel-specific, to
+quirk_no_flr(), and apply it to prevent the use of FLR on these AMD
+devices.
+
+Link: https://lore.kernel.org/r/CAAri2DpkcuQZYbT6XsALhx2e6vRqPHwtbjHYeiH7MNp4zmt1RA@mail.gmail.com
+Signed-off-by: Marcos Scriven <marcos@scriven.org>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pci/quirks.c | 18 ++++++++++++++----
+ 1 file changed, 14 insertions(+), 4 deletions(-)
+
+diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
+index 2e50eec41dc4..ba3b114dcfa9 100644
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -5130,13 +5130,23 @@ static void quirk_intel_qat_vf_cap(struct pci_dev *pdev)
+ }
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x443, quirk_intel_qat_vf_cap);
+
+-/* FLR may cause some 82579 devices to hang */
+-static void quirk_intel_no_flr(struct pci_dev *dev)
++/*
++ * FLR may cause the following to devices to hang:
++ *
++ * AMD Starship/Matisse HD Audio Controller 0x1487
++ * AMD Matisse USB 3.0 Host Controller 0x149c
++ * Intel 82579LM Gigabit Ethernet Controller 0x1502
++ * Intel 82579V Gigabit Ethernet Controller 0x1503
++ *
++ */
++static void quirk_no_flr(struct pci_dev *dev)
+ {
+ dev->dev_flags |= PCI_DEV_FLAGS_NO_FLR_RESET;
+ }
+-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1502, quirk_intel_no_flr);
+-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1503, quirk_intel_no_flr);
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1487, quirk_no_flr);
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x149c, quirk_no_flr);
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1502, quirk_no_flr);
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1503, quirk_no_flr);
+
+ static void quirk_no_ext_tags(struct pci_dev *pdev)
+ {
+--
+2.25.1
+
--- /dev/null
+From 7b42ea2433a8e40edbb786005913c8483e28ae4a Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sun, 24 May 2020 00:35:29 -0700
+Subject: PCI: Avoid FLR for AMD Starship USB 3.0
+
+From: Kevin Buettner <kevinb@redhat.com>
+
+[ Upstream commit 5727043c73fdfe04597971b5f3f4850d879c1f4f ]
+
+The AMD Starship USB 3.0 host controller advertises Function Level Reset
+support, but it apparently doesn't work. Add a quirk to prevent use of FLR
+on this device.
+
+Without this quirk, when attempting to assign (pass through) an AMD
+Starship USB 3.0 host controller to a guest OS, the system becomes
+increasingly unresponsive over the course of several minutes, eventually
+requiring a hard reset. Shortly after attempting to start the guest, I see
+these messages:
+
+ vfio-pci 0000:05:00.3: not ready 1023ms after FLR; waiting
+ vfio-pci 0000:05:00.3: not ready 2047ms after FLR; waiting
+ vfio-pci 0000:05:00.3: not ready 4095ms after FLR; waiting
+ vfio-pci 0000:05:00.3: not ready 8191ms after FLR; waiting
+
+And then eventually:
+
+ vfio-pci 0000:05:00.3: not ready 65535ms after FLR; giving up
+ INFO: NMI handler (perf_event_nmi_handler) took too long to run: 0.000 msecs
+ perf: interrupt took too long (642744 > 2500), lowering kernel.perf_event_max_sample_rate to 1000
+ INFO: NMI handler (perf_event_nmi_handler) took too long to run: 82.270 msecs
+ INFO: NMI handler (perf_event_nmi_handler) took too long to run: 680.608 msecs
+ INFO: NMI handler (perf_event_nmi_handler) took too long to run: 100.952 msecs
+ ...
+ watchdog: BUG: soft lockup - CPU#3 stuck for 22s! [qemu-system-x86:7487]
+
+Tested on a Micro-Star International Co., Ltd. MS-7C59/Creator TRX40
+motherboard with an AMD Ryzen Threadripper 3970X.
+
+Link: https://lore.kernel.org/r/20200524003529.598434ff@f31-4.lan
+Signed-off-by: Kevin Buettner <kevinb@redhat.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pci/quirks.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
+index ba3b114dcfa9..d59a735927f7 100644
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -5134,6 +5134,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x443, quirk_intel_qat_vf_cap);
+ * FLR may cause the following to devices to hang:
+ *
+ * AMD Starship/Matisse HD Audio Controller 0x1487
++ * AMD Starship USB 3.0 Host Controller 0x148c
+ * AMD Matisse USB 3.0 Host Controller 0x149c
+ * Intel 82579LM Gigabit Ethernet Controller 0x1502
+ * Intel 82579V Gigabit Ethernet Controller 0x1503
+@@ -5144,6 +5145,7 @@ static void quirk_no_flr(struct pci_dev *dev)
+ dev->dev_flags |= PCI_DEV_FLAGS_NO_FLR_RESET;
+ }
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x1487, quirk_no_flr);
++DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x148c, quirk_no_flr);
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, 0x149c, quirk_no_flr);
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1502, quirk_no_flr);
+ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1503, quirk_no_flr);
+--
+2.25.1
+
--- /dev/null
+From e8dec169572870985d5837aeeed2aade4fc4355e Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 8 May 2020 14:53:41 +0800
+Subject: PCI: Avoid Pericom USB controller OHCI/EHCI PME# defect
+
+From: Kai-Heng Feng <kai.heng.feng@canonical.com>
+
+[ Upstream commit 68f5fc4ea9ddf9f77720d568144219c4e6452cde ]
+
+Both Pericom OHCI and EHCI devices advertise PME# support from all power
+states:
+
+ 06:00.0 USB controller [0c03]: Pericom Semiconductor PI7C9X442SL USB OHCI Controller [12d8:400e] (rev 01) (prog-if 10 [OHCI])
+ Subsystem: Pericom Semiconductor PI7C9X442SL USB OHCI Controller [12d8:400e]
+ Capabilities: [80] Power Management version 3
+ Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
+
+ 06:00.2 USB controller [0c03]: Pericom Semiconductor PI7C9X442SL USB EHCI Controller [12d8:400f] (rev 01) (prog-if 20 [EHCI])
+ Subsystem: Pericom Semiconductor PI7C9X442SL USB EHCI Controller [12d8:400f]
+ Capabilities: [80] Power Management version 3
+ Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
+
+But testing shows that it's unreliable: there is a 20% chance PME# won't be
+asserted when a USB device is plugged.
+
+Remove PME support for both devices to make USB plugging work reliably.
+
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=205981
+Link: https://lore.kernel.org/r/20200508065343.32751-2-kai.heng.feng@canonical.com
+Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pci/quirks.c | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
+index 798e52051ecc..2e50eec41dc4 100644
+--- a/drivers/pci/quirks.c
++++ b/drivers/pci/quirks.c
+@@ -5551,6 +5551,19 @@ static void pci_fixup_no_d0_pme(struct pci_dev *dev)
+ }
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x2142, pci_fixup_no_d0_pme);
+
++/*
++ * Device [12d8:0x400e] and [12d8:0x400f]
++ * These devices advertise PME# support in all power states but don't
++ * reliably assert it.
++ */
++static void pci_fixup_no_pme(struct pci_dev *dev)
++{
++ pci_info(dev, "PME# is unreliable, disabling it\n");
++ dev->pme_support = 0;
++}
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_PERICOM, 0x400e, pci_fixup_no_pme);
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_PERICOM, 0x400f, pci_fixup_no_pme);
++
+ static void apex_pci_fixup_class(struct pci_dev *pdev)
+ {
+ pdev->class = (PCI_CLASS_SYSTEM_OTHER << 8) | pdev->class;
+--
+2.25.1
+
--- /dev/null
+From 1709eb3ff375ad6e9734d58b281715277e2cc125 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 12 Nov 2019 05:47:53 -0700
+Subject: PCI: vmd: Add device id for VMD device 8086:9A0B
+
+From: Jon Derrick <jonathan.derrick@intel.com>
+
+[ Upstream commit ec11e5c213cc20cac5e8310728b06793448b9f6d ]
+
+This patch adds support for this VMD device which supports the bus
+restriction mode.
+
+Signed-off-by: Jon Derrick <jonathan.derrick@intel.com>
+Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/pci/controller/vmd.c | 2 ++
+ include/linux/pci_ids.h | 1 +
+ 2 files changed, 3 insertions(+)
+
+diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c
+index a35d3f3996d7..afc1a3d240b5 100644
+--- a/drivers/pci/controller/vmd.c
++++ b/drivers/pci/controller/vmd.c
+@@ -854,6 +854,8 @@ static const struct pci_device_id vmd_ids[] = {
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_28C0),
+ .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW |
+ VMD_FEAT_HAS_BUS_RESTRICTIONS,},
++ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_9A0B),
++ .driver_data = VMD_FEAT_HAS_BUS_RESTRICTIONS,},
+ {0,}
+ };
+ MODULE_DEVICE_TABLE(pci, vmd_ids);
+diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
+index 228f66347620..dae9ffe4478f 100644
+--- a/include/linux/pci_ids.h
++++ b/include/linux/pci_ids.h
+@@ -3008,6 +3008,7 @@
+ #define PCI_DEVICE_ID_INTEL_84460GX 0x84ea
+ #define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500
+ #define PCI_DEVICE_ID_INTEL_IXP2800 0x9004
++#define PCI_DEVICE_ID_INTEL_VMD_9A0B 0x9a0b
+ #define PCI_DEVICE_ID_INTEL_S21152BB 0xb152
+
+ #define PCI_VENDOR_ID_SCALEMP 0x8686
+--
+2.25.1
+
--- /dev/null
+From 5737b0a969f23aa1a1edce419579af5f08a30c9c Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 8 May 2020 14:53:40 +0800
+Subject: serial: 8250_pci: Move Pericom IDs to pci_ids.h
+
+From: Kai-Heng Feng <kai.heng.feng@canonical.com>
+
+[ Upstream commit 62a7f3009a460001eb46984395280dd900bc4ef4 ]
+
+Move the IDs to pci_ids.h so it can be used by next patch.
+
+Link: https://lore.kernel.org/r/20200508065343.32751-1-kai.heng.feng@canonical.com
+Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Cc: stable@vger.kernel.org
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/tty/serial/8250/8250_pci.c | 6 ------
+ include/linux/pci_ids.h | 6 ++++++
+ 2 files changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
+index 8a01d034f9d1..7cad66eb39ff 100644
+--- a/drivers/tty/serial/8250/8250_pci.c
++++ b/drivers/tty/serial/8250/8250_pci.c
+@@ -1871,12 +1871,6 @@ pci_moxa_setup(struct serial_private *priv,
+ #define PCIE_DEVICE_ID_WCH_CH384_4S 0x3470
+ #define PCIE_DEVICE_ID_WCH_CH382_2S 0x3253
+
+-#define PCI_VENDOR_ID_PERICOM 0x12D8
+-#define PCI_DEVICE_ID_PERICOM_PI7C9X7951 0x7951
+-#define PCI_DEVICE_ID_PERICOM_PI7C9X7952 0x7952
+-#define PCI_DEVICE_ID_PERICOM_PI7C9X7954 0x7954
+-#define PCI_DEVICE_ID_PERICOM_PI7C9X7958 0x7958
+-
+ #define PCI_VENDOR_ID_ACCESIO 0x494f
+ #define PCI_DEVICE_ID_ACCESIO_PCIE_COM_2SDB 0x1051
+ #define PCI_DEVICE_ID_ACCESIO_MPCIE_COM_2S 0x1053
+diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
+index 1dfc4e1dcb94..9a57e6717e5c 100644
+--- a/include/linux/pci_ids.h
++++ b/include/linux/pci_ids.h
+@@ -1832,6 +1832,12 @@
+ #define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2
+ #define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018
+
++#define PCI_VENDOR_ID_PERICOM 0x12D8
++#define PCI_DEVICE_ID_PERICOM_PI7C9X7951 0x7951
++#define PCI_DEVICE_ID_PERICOM_PI7C9X7952 0x7952
++#define PCI_DEVICE_ID_PERICOM_PI7C9X7954 0x7954
++#define PCI_DEVICE_ID_PERICOM_PI7C9X7958 0x7958
++
+ #define PCI_SUBVENDOR_ID_CHASE_PCIFAST 0x12E0
+ #define PCI_SUBDEVICE_ID_CHASE_PCIFAST4 0x0031
+ #define PCI_SUBDEVICE_ID_CHASE_PCIFAST8 0x0021
+--
+2.25.1
+
ext4-fix-ext_max_extent-index-to-check-for-zeroed-eh_max.patch
ext4-fix-error-pointer-dereference.patch
ext4-fix-race-between-ext4_sync_parent-and-rename.patch
+pci-avoid-pericom-usb-controller-ohci-ehci-pme-defec.patch
+pci-avoid-flr-for-amd-matisse-hd-audio-usb-3.0.patch
+pci-avoid-flr-for-amd-starship-usb-3.0.patch
+pci-add-acs-quirk-for-intel-root-complex-integrated-.patch
+pci-vmd-add-device-id-for-vmd-device-8086-9a0b.patch
+x86-amd_nb-add-family-19h-pci-ids.patch
+pci-add-loongson-vendor-id.patch
+serial-8250_pci-move-pericom-ids-to-pci_ids.h.patch
+x86-amd_nb-add-amd-family-17h-model-60h-pci-ids.patch
--- /dev/null
+From 1673a14b31396142ae467732f604d81dce7b6b13 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Sun, 10 May 2020 20:48:40 +0000
+Subject: x86/amd_nb: Add AMD family 17h model 60h PCI IDs
+
+From: Alexander Monakov <amonakov@ispras.ru>
+
+[ Upstream commit a4e91825d7e1252f7cba005f1451e5464b23c15d ]
+
+Add PCI IDs for AMD Renoir (4000-series Ryzen CPUs). This is necessary
+to enable support for temperature sensors via the k10temp module.
+
+Signed-off-by: Alexander Monakov <amonakov@ispras.ru>
+Signed-off-by: Borislav Petkov <bp@suse.de>
+Acked-by: Yazen Ghannam <yazen.ghannam@amd.com>
+Acked-by: Guenter Roeck <linux@roeck-us.net>
+Link: https://lkml.kernel.org/r/20200510204842.2603-2-amonakov@ispras.ru
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/x86/kernel/amd_nb.c | 5 +++++
+ include/linux/pci_ids.h | 1 +
+ 2 files changed, 6 insertions(+)
+
+diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
+index 69aed0ebbdfc..c4bc01da820e 100644
+--- a/arch/x86/kernel/amd_nb.c
++++ b/arch/x86/kernel/amd_nb.c
+@@ -18,9 +18,11 @@
+ #define PCI_DEVICE_ID_AMD_17H_ROOT 0x1450
+ #define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
+ #define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480
++#define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
+ #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
+ #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
+ #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
++#define PCI_DEVICE_ID_AMD_17H_M60H_DF_F4 0x144c
+ #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444
+ #define PCI_DEVICE_ID_AMD_19H_DF_F4 0x1654
+
+@@ -33,6 +35,7 @@ static const struct pci_device_id amd_root_ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_ROOT) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) },
++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_ROOT) },
+ {}
+ };
+
+@@ -51,6 +54,7 @@ const struct pci_device_id amd_nb_misc_ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) },
+@@ -67,6 +71,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_DF_F4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) },
++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
+diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
+index 9a57e6717e5c..0ad57693f392 100644
+--- a/include/linux/pci_ids.h
++++ b/include/linux/pci_ids.h
+@@ -550,6 +550,7 @@
+ #define PCI_DEVICE_ID_AMD_17H_DF_F3 0x1463
+ #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb
+ #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493
++#define PCI_DEVICE_ID_AMD_17H_M60H_DF_F3 0x144b
+ #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443
+ #define PCI_DEVICE_ID_AMD_19H_DF_F3 0x1653
+ #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
+--
+2.25.1
+
--- /dev/null
+From 1150ac2b059bb6a91e9c5ccc00d5d055392e3780 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 10 Jan 2020 01:56:49 +0000
+Subject: x86/amd_nb: Add Family 19h PCI IDs
+
+From: Yazen Ghannam <yazen.ghannam@amd.com>
+
+[ Upstream commit b3f79ae45904ae987a7c06a9e8d6084d7b73e67f ]
+
+Add the new PCI Device 18h IDs for AMD Family 19h systems. Note that
+Family 19h systems will not have a new PCI root device ID.
+
+Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
+Signed-off-by: Borislav Petkov <bp@suse.de>
+Link: https://lkml.kernel.org/r/20200110015651.14887-4-Yazen.Ghannam@amd.com
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/x86/kernel/amd_nb.c | 3 +++
+ include/linux/pci_ids.h | 1 +
+ 2 files changed, 4 insertions(+)
+
+diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
+index 251c795b4eb3..69aed0ebbdfc 100644
+--- a/arch/x86/kernel/amd_nb.c
++++ b/arch/x86/kernel/amd_nb.c
+@@ -22,6 +22,7 @@
+ #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
+ #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
+ #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444
++#define PCI_DEVICE_ID_AMD_19H_DF_F4 0x1654
+
+ /* Protect the PCI config register pairs used for SMN and DF indirect access. */
+ static DEFINE_MUTEX(smn_mutex);
+@@ -52,6 +53,7 @@ const struct pci_device_id amd_nb_misc_ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) },
++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) },
+ {}
+ };
+ EXPORT_SYMBOL_GPL(amd_nb_misc_ids);
+@@ -66,6 +68,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) },
++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
+ {}
+ };
+diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
+index dae9ffe4478f..6693cf561cd1 100644
+--- a/include/linux/pci_ids.h
++++ b/include/linux/pci_ids.h
+@@ -549,6 +549,7 @@
+ #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F3 0x15eb
+ #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493
+ #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443
++#define PCI_DEVICE_ID_AMD_19H_DF_F3 0x1653
+ #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
+ #define PCI_DEVICE_ID_AMD_LANCE 0x2000
+ #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
+--
+2.25.1
+
projects / thirdparty / kernel / stable-queue.git / commitdiff
