clk: px30: Allow use of GPU and WIFI_PMU in assigned-clocks

Add dummy implementation of set_rate for SCLK_GPU and SCLK_WIFI_PMU to
allow use of dts/upstream assigned-clocks in cru and pmucru nodes.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index ad7e1c0f2460e3deb5bf24ff6e80ef8c6e80139c..b5054e84c3269d40f70d01a6d755264d85f32a3a 100644 (file)
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -1360,6 +1360,9 @@ static ulong px30_clk_set_rate(struct clk *clk, ulong rate)
        case SCLK_GMAC_RMII:
                ret = px30_mac_set_speed_clk(priv, rate);
                break;
+       /* Might occur in cru assigned-clocks, can be ignored here */
+       case SCLK_GPU:
+               break;
 #endif
        default:
                return -ENOENT;
@@ -1726,6 +1729,9 @@ static ulong px30_pmuclk_set_rate(struct clk *clk, ulong rate)
        case SCLK_UART0_PMU:
                ret = px30_pmu_uart0_set_clk(priv, rate);
                break;
+       /* Might occur in pmucru assigned-clocks, can be ignored here */
+       case SCLK_WIFI_PMU:
+               break;
        default:
                return -ENOENT;
        }