Make the K1 clock controllers visible to SPL by tagging the four root
fixed clocks (osc_32k, vctcxo_{1,3,24}m) and the four syscon nodes
(mpmu, pll, apmu, apbc) with bootph-pre-ram in the BPI-F3 U-Boot
overlay.
Signed-off-by: Raymond Mao <raymond.mao@riscstar.com>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Tested-by: Songsong Zhang <sszhang@vsit.ai>
&uart0 {
bootph-pre-ram;
};
+
+&osc_32k {
+ bootph-pre-ram;
+};
+
+&vctcxo_1m {
+ bootph-pre-ram;
+};
+
+&vctcxo_3m {
+ bootph-pre-ram;
+};
+
+&vctcxo_24m {
+ bootph-pre-ram;
+};
+
+&syscon_mpmu {
+ bootph-pre-ram;
+};
+
+&pll {
+ bootph-pre-ram;
+};
+
+&syscon_apmu {
+ bootph-pre-ram;
+};
+
+&syscon_apbc {
+ bootph-pre-ram;
+};