]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: tqma8mpql-mba8mpxl: Configure multiple queues on eqos
authorAlexander Stein <alexander.stein@ew.tq-group.com>
Thu, 26 Feb 2026 13:02:20 +0000 (14:02 +0100)
committerFrank Li <Frank.Li@nxp.com>
Fri, 13 Mar 2026 18:18:43 +0000 (14:18 -0400)
The MBa8MPxL mainboard has an integrated PHY connected to the EQOS
ethernet controller which can support up to five queues. Configure
these queues in the same manor as done on the imx8mp-evk.

Setting DMA to threas mode is necessary to prevent FIFO overflows, see
commit 0bc3e333a0c82 ("arm64: dts: imx8mp-evk: configure multiple queues
on eqos")

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts

index ad49bf85a04d39e32322c13c2b6ef57e82f79d40..890d1e525a4896a16a20bb5acdb4a13808efd0b0 100644 (file)
        pinctrl-0 = <&pinctrl_eqos>, <&pinctrl_eqos_phy>;
        phy-mode = "rgmii-id";
        phy-handle = <&ethphy3>;
+       snps,force_thresh_dma_mode;
+       snps,mtl-tx-config = <&mtl_tx_setup>;
+       snps,mtl-rx-config = <&mtl_rx_setup>;
        status = "okay";
 
        mdio {
                        interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
                };
        };
+
+       mtl_tx_setup: tx-queues-config {
+               snps,tx-queues-to-use = <5>;
+
+               queue0 {
+                       snps,dcb-algorithm;
+                       snps,priority = <0x1>;
+               };
+
+               queue1 {
+                       snps,dcb-algorithm;
+                       snps,priority = <0x2>;
+               };
+
+               queue2 {
+                       snps,dcb-algorithm;
+                       snps,priority = <0x4>;
+               };
+
+               queue3 {
+                       snps,dcb-algorithm;
+                       snps,priority = <0x8>;
+               };
+
+               queue4 {
+                       snps,dcb-algorithm;
+                       snps,priority = <0xf0>;
+               };
+       };
+
+       mtl_rx_setup: rx-queues-config {
+               snps,rx-queues-to-use = <5>;
+               snps,rx-sched-sp;
+
+               queue0 {
+                       snps,dcb-algorithm;
+                       snps,priority = <0x1>;
+                       snps,map-to-dma-channel = <0>;
+               };
+
+               queue1 {
+                       snps,dcb-algorithm;
+                       snps,priority = <0x2>;
+                       snps,map-to-dma-channel = <1>;
+               };
+
+               queue2 {
+                       snps,dcb-algorithm;
+                       snps,priority = <0x4>;
+                       snps,map-to-dma-channel = <2>;
+               };
+
+               queue3 {
+                       snps,dcb-algorithm;
+                       snps,priority = <0x8>;
+                       snps,map-to-dma-channel = <3>;
+               };
+
+               queue4 {
+                       snps,dcb-algorithm;
+                       snps,priority = <0xf0>;
+                       snps,map-to-dma-channel = <4>;
+               };
+       };
 };
 
 &fec {