]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amd/display: Get maximum pixel clock from VBIOS
authorTimur Kristóf <timur.kristof@gmail.com>
Fri, 26 Sep 2025 18:01:46 +0000 (20:01 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 28 Oct 2025 14:08:36 +0000 (10:08 -0400)
We will use this for validating the pixel clock when
an analog monitor is connected to VGA or DVI-I connectors.

For reference, see the legacy display code:
amdgpu_connector_vga_mode_valid

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c
drivers/gpu/drm/amd/display/include/grph_object_ctrl_defs.h

index c7875edea3213cfa7c5ee51cfa41fa1d0537a4e6..33d0ec38ded7119e4bf99dc6d8b6b05505495fb9 100644 (file)
@@ -441,6 +441,7 @@ static enum bp_result get_firmware_info_v1_4(
                le32_to_cpu(firmware_info->ulMinPixelClockPLL_Output) * 10;
        info->pll_info.max_output_pxl_clk_pll_frequency =
                le32_to_cpu(firmware_info->ulMaxPixelClockPLL_Output) * 10;
+       info->max_pixel_clock = le16_to_cpu(firmware_info->usMaxPixelClock) * 10;
 
        if (firmware_info->usFirmwareCapability.sbfAccess.MemoryClockSS_Support)
                /* Since there is no information on the SS, report conservative
@@ -497,6 +498,7 @@ static enum bp_result get_firmware_info_v2_1(
        info->external_clock_source_frequency_for_dp =
                le16_to_cpu(firmwareInfo->usUniphyDPModeExtClkFreq) * 10;
        info->min_allowed_bl_level = firmwareInfo->ucMinAllowedBL_Level;
+       info->max_pixel_clock = le16_to_cpu(firmwareInfo->usMaxPixelClock) * 10;
 
        /* There should be only one entry in the SS info table for Memory Clock
         */
index cc467031651daa0e3d9fa96031ba3576845a6548..38a77fa9b4afdef7a206c236cdc22f8572c015e7 100644 (file)
@@ -169,6 +169,7 @@ struct dc_firmware_info {
                uint32_t engine_clk_ss_percentage;
        } feature;
 
+       uint32_t max_pixel_clock; /* in KHz */
        uint32_t default_display_engine_pll_frequency; /* in KHz */
        uint32_t external_clock_source_frequency_for_dp; /* in KHz */
        uint32_t smu_gpu_pll_output_freq; /* in KHz */