return TLBRET_MATCH;
}
-static TLBRet loongarch_page_table_walker(CPULoongArchState *env,
- MMUContext *context,
- int access_type, int mmu_idx)
+static TLBRet loongarch_ptw(CPULoongArchState *env, MMUContext *context,
+ int access_type, int mmu_idx, int debug)
{
CPUState *cs = env_cpu(env);
target_ulong index, phys;
* legal mapping, even if the mapping is not yet in TLB. return 0 if
* there is a valid map, else none zero.
*/
- return loongarch_page_table_walker(env, context, access_type, mmu_idx);
+ return loongarch_ptw(env, context, access_type, mmu_idx, is_debug);
}
return TLBRET_NOMATCH;