ARM64: zynqmp: Adding DT node for Xilinx NWL PCIe Host Controller

Adding PCIe Root Port driver node for Xilinx PCIe NWL bridge IP.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/zynqmp-zcu102.dts b/arch/arm/dts/zynqmp-zcu102.dts
index d0c6bbf1542dcd61a1d64847570302b61f13766e..6e8f17beb1b1edcf7cd05a8a71bef8078634a826 100644 (file)
--- a/arch/arm/dts/zynqmp-zcu102.dts
+++ b/arch/arm/dts/zynqmp-zcu102.dts
@@ -473,6 +473,10 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
        };
 };
 
+&pcie {
+       status = "okay";
+};
+
 &qspi {
        status = "okay";
        flash@0 {

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 216c6af77ce9ef6df8666dd736df3923200aa3eb..24a34e6d85d2e5c8ecf1e38a62f89608835a9154 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -382,6 +382,26 @@
                        #size-cells = <0>;
                };
 
+               pcie: pcie@fd0e0000 {
+                       compatible = "xlnx,nwl-pcie-2.11";
+                       status = "disabled";
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       #interrupt-cells = <1>;
+                       device_type = "pci";
+                       interrupt-parent = <&gic>;
+                       interrupts = < 0 118 4>,
+                                    < 0 116 4>,
+                                    < 0 115 4>,        /* MSI_1 [63...32] */
+                                    < 0 114 4 >;       /* MSI_0 [31...0] */
+                       interrupt-names = "misc", "intx", "msi_1", "msi_0";
+                       reg = <0x0 0xfd0e0000 0x1000>,
+                             <0x0 0xfd480000 0x1000>,
+                             <0x0 0xe0000000 0x1000000>;
+                       reg-names = "breg", "pcireg", "cfg";
+                       ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
+               };
+
                qspi: spi@ff0f0000 {
                        compatible = "xlnx,zynqmp-qspi-1.0";
                        status = "disabled";