]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: st: Add PCIe Endpoint mode on stm32mp251
authorChristian Bruel <christian.bruel@foss.st.com>
Wed, 20 Aug 2025 07:54:10 +0000 (09:54 +0200)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Mon, 15 Sep 2025 15:51:30 +0000 (17:51 +0200)
Add pcie_ep node to support STM32 MP25 PCIe driver based on the
DesignWare PCIe core configured as Endpoint mode

Signed-off-by: Christian Bruel <christian.bruel@foss.st.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Link: https://lore.kernel.org/r/20250820075411.1178729-11-christian.bruel@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm64/boot/dts/st/stm32mp251.dtsi

index 235a57a31df6c174ce97ba3ba6ceeb1de2e3a5fd..605b6a5d39a613745b55a0e2c8c500e8581b9fbd 100644 (file)
                                };
                        };
 
+                       pcie_ep: pcie-ep@48400000 {
+                               compatible = "st,stm32mp25-pcie-ep";
+                               reg = <0x48400000 0x100000>,
+                                     <0x48500000 0x100000>,
+                                     <0x48700000 0x80000>,
+                                     <0x10000000 0x10000000>;
+                               reg-names = "dbi", "dbi2", "atu", "addr_space";
+                               clocks = <&rcc CK_BUS_PCIE>;
+                               resets = <&rcc PCIE_R>;
+                               phys = <&combophy PHY_TYPE_PCIE>;
+                               access-controllers = <&rifsc 68>;
+                               power-domains = <&CLUSTER_PD>;
+                               status = "disabled";
+                       };
+
                        pcie_rc: pcie@48400000 {
                                compatible = "st,stm32mp25-pcie-rc";
                                device_type = "pci";