arm64: dts: qcom: sm8450: Add missing interconnects to serial

[ Upstream commit 6e115b75b43bd12d4061e53c8ff175e387783d8a ]

The serial ports did not have their interconnect paths specified when
they were first introduced. Fix that.

Fixes: 5188049c9b36 ("arm64: dts: qcom: Add base SM8450 DTSI")
Fixes: f5837418479a ("arm64: dts: qcom: sm8450: add uart20 node")
Reported-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Suggested-by: Georgi Djakov <djakov@kernel.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240116-topic-8450serial-v1-1-b685e6a5ad78@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 01e4dfc4babd2904eee95b3eaf4d63516d6c019a..06f183ef8c78fdd4c170b1e870782568ad4e5117 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -1028,6 +1028,12 @@
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_uart20_default>;
                                interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
+                               interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
+                                                &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config";
                                status = "disabled";
                        };
 
@@ -1420,6 +1426,12 @@
                                pinctrl-names = "default";
                                pinctrl-0 = <&qup_uart7_tx>, <&qup_uart7_rx>;
                                interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
+                               interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS
+                                                &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>,
+                                               <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+                                                &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>;
+                               interconnect-names = "qup-core",
+                                                    "qup-config";
                                status = "disabled";
                        };
                };