Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1bcd52ae9e20e6c8c62eb995160e10de9ddb418a..8a3cfbdf9c8c901e8eb3f357b06bf8cd3ba9303a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,31 @@
+2022-03-05  Jakub Jelinek  <jakub@redhat.com>
+
+       * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p): Remove
+       visited bitmap and its use.  Also punt on EDGE_ABNORMAL edges.
+
+2022-03-05  Roger Sayle  <roger@nextmovesoftware.com>
+           Uroš Bizjak  <ubizjak@gmail.com>
+
+       PR testsuite/104732
+       * config/i386/i386.md (SWIM1248x): Renamed from SWIM1248s.
+       Include DI mode unconditionally.
+       (*anddi3_doubleword): Remove && TARGET_STV && TARGET_SSE2 condition,
+       i.e. always split on !TARGET_64BIT.
+       (*<any_or>di3_doubleword): Likewise.
+       (*one_cmpldi2_doubleword): Likewise.
+       (and<mode>3 expander): Update to use SWIM1248x from SWIM1248s.
+       (<any_or><mode>3 expander): Likewise.
+       (one_cmpl<mode>2 expander): Likewise.
+
+2022-03-05   Michael Meissner  <meissner@linux.ibm.com>
+
+       PR target/104698
+       * config/rs6000/vsx.md (UNSPEC_MTVSRD_DITI_W1): Delete.
+       (mtvsrdd_diti_w1): Delete.
+       (extendditi2): Convert from define_expand to
+       define_insn_and_split.  Replace with code to deal with both GPR
+       registers and with altivec registers.
+
 2022-03-04  Segher Boessenkool  <segher@kernel.crashing.org>
 
        * config/rs6000/rs6000.cc (rs6000_machine_from_flags): Restructure a

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 4adac24b699a6f9bd4d35dd805a551e84b36af74..7d441aae7d7f1d44836ca61980a13df8551dbe64 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20220305
+20220306

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ab8cd5b6415c297a9dccfd08d24777c474a3bef5..3987bb0f44e0be444c9678c5f2285fd6ba8ce5e9 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,15 @@
+2022-03-05  Roger Sayle  <roger@nextmovesoftware.com>
+           Uroš Bizjak  <ubizjak@gmail.com>
+
+       PR testsuite/104732
+       * gcc.target/i386/pr104732.c: New test case.
+
+2022-03-05   Michael Meissner  <meissner@linux.ibm.com>
+
+       PR target/104698
+       * gcc.target/powerpc/pr104698-1.c: New test.
+       * gcc.target/powerpc/pr104698-2.c: New test.
+
 2022-03-04  Nathan Sidwell  <nathan@acm.org>
 
        * g++.dg/modules/std-subst-2.C: New.

diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index e82a0c8e074c5879ca231ece93b74a68acaf92d1..6237d55dc42614aa7bf4abe0985ba0c41cd6a124 100644 (file)
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,9 @@
+2022-03-05  Jonathan Wakely  <jwakely@redhat.com>
+
+       * include/bits/c++config (__glibcxx_assert_fail): Add visibility
+       attribute.
+       (__terminate): Likewise.
+
 2022-03-04  Jonathan Wakely  <jwakely@redhat.com>
 
        * libsupc++/compare (strong_order::_S_fp_cmp): Move typedef