--- /dev/null
+From cad065ed8d8831df67b9754cc4437ed55d8b48c0 Mon Sep 17 00:00:00 2001
+From: Paul Cercueil <paul@crapouillou.net>
+Date: Fri, 25 Jun 2021 11:49:29 +0100
+Subject: MIPS: MT extensions are not available on MIPS32r1
+
+From: Paul Cercueil <paul@crapouillou.net>
+
+commit cad065ed8d8831df67b9754cc4437ed55d8b48c0 upstream.
+
+MIPS MT extensions were added with the MIPS 34K processor, which was
+based on the MIPS32r2 ISA.
+
+This fixes a build error when building a generic kernel for a MIPS32r1
+CPU.
+
+Fixes: c434b9f80b09 ("MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol")
+Cc: stable@vger.kernel.org # v5.9
+Signed-off-by: Paul Cercueil <paul@crapouillou.net>
+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/mips/include/asm/cpu-features.h | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/include/asm/cpu-features.h
++++ b/arch/mips/include/asm/cpu-features.h
+@@ -64,6 +64,8 @@
+ ((MIPS_ISA_REV >= (ge)) && (MIPS_ISA_REV < (lt)))
+ #define __isa_range_or_flag(ge, lt, flag) \
+ (__isa_range(ge, lt) || ((MIPS_ISA_REV < (lt)) && __isa(flag)))
++#define __isa_range_and_ase(ge, lt, ase) \
++ (__isa_range(ge, lt) && __ase(ase))
+
+ /*
+ * SMP assumption: Options of CPU 0 are a superset of all processors.
+@@ -421,7 +423,7 @@
+ #endif
+
+ #ifndef cpu_has_mipsmt
+-#define cpu_has_mipsmt __isa_lt_and_ase(6, MIPS_ASE_MIPSMT)
++#define cpu_has_mipsmt __isa_range_and_ase(2, 6, MIPS_ASE_MIPSMT)
+ #endif
+
+ #ifndef cpu_has_vp
--- /dev/null
+From c4bf1f25c6c187864681d5ad4dd1fa92f62d5d32 Mon Sep 17 00:00:00 2001
+From: Vidya Sagar <vidyas@nvidia.com>
+Date: Tue, 4 May 2021 22:51:57 +0530
+Subject: PCI: tegra194: Fix host initialization during resume
+
+From: Vidya Sagar <vidyas@nvidia.com>
+
+commit c4bf1f25c6c187864681d5ad4dd1fa92f62d5d32 upstream.
+
+Commit 275e88b06a27 ("PCI: tegra: Fix host link initialization") broke
+host initialization during resume as it misses out calling the API
+dw_pcie_setup_rc() which is required for host and MSI initialization.
+
+Link: https://lore.kernel.org/r/20210504172157.29712-1-vidyas@nvidia.com
+Fixes: 275e88b06a27 ("PCI: tegra: Fix host link initialization")
+Tested-by: Jon Hunter <jonathanh@nvidia.com>
+Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
+Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/pci/controller/dwc/pcie-tegra194.c | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/drivers/pci/controller/dwc/pcie-tegra194.c
++++ b/drivers/pci/controller/dwc/pcie-tegra194.c
+@@ -2214,6 +2214,8 @@ static int tegra_pcie_dw_resume_noirq(st
+ goto fail_host_init;
+ }
+
++ dw_pcie_setup_rc(&pcie->pci.pp);
++
+ ret = tegra_pcie_dw_start_link(&pcie->pci);
+ if (ret < 0)
+ goto fail_host_init;