phy: qcom-qmp: Move SERDES/PCS START after PHY reset

Driver is currently performing PHY reset after starting
SERDES/PCS. As per hardware datasheet reset must be done
before starting PHY. Hence, update the sequence.

Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index ecff2616dc84b952eacb80b5b2b2e5bf6c10f147..edb6bbe95558a610ebd5af2e08acb8abf11b7d5d 100644 (file)
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -896,12 +896,12 @@ static int qcom_qmp_phy_init(struct phy *phy)
        if (cfg->has_pwrdn_delay)
                usleep_range(cfg->pwrdn_delay_min, cfg->pwrdn_delay_max);
 
-       /* start SerDes and Phy-Coding-Sublayer */
-       qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
-
        /* Pull PHY out of reset state */
        qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
 
+       /* start SerDes and Phy-Coding-Sublayer */
+       qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
+
        status = pcs + cfg->regs[QPHY_PCS_READY_STATUS];
        mask = cfg->mask_pcs_ready;