iio: adc: rockchip: Fix clock initialization sequence

commit 839f81de397019f55161c5982d670ac19d836173 upstream.

clock_set_rate should be executed after devm_clk_get_enabled.

Fixes: 97ad10bb2901 ("iio: adc: rockchip_saradc: Make use of devm_clk_get_enabled")
Signed-off-by: Simon Xue <xxm@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20250312062016.137821-1-xxm@rock-chips.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
index 929cba215d99ab685c72115418c63d7caf8a250a..7b4eb4a200df81156352d7b1b765cf4ac99d2b4e 100644 (file)
--- a/drivers/iio/adc/rockchip_saradc.c
+++ b/drivers/iio/adc/rockchip_saradc.c
@@ -485,15 +485,6 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
        if (info->reset)
                rockchip_saradc_reset_controller(info->reset);
 
-       /*
-        * Use a default value for the converter clock.
-        * This may become user-configurable in the future.
-        */
-       ret = clk_set_rate(info->clk, info->data->clk_rate);
-       if (ret < 0)
-               return dev_err_probe(&pdev->dev, ret,
-                                    "failed to set adc clk rate\n");
-
        ret = regulator_enable(info->vref);
        if (ret < 0)
                return dev_err_probe(&pdev->dev, ret,
@@ -520,6 +511,14 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
        if (IS_ERR(info->clk))
                return dev_err_probe(&pdev->dev, PTR_ERR(info->clk),
                                     "failed to get adc clock\n");
+       /*
+        * Use a default value for the converter clock.
+        * This may become user-configurable in the future.
+        */
+       ret = clk_set_rate(info->clk, info->data->clk_rate);
+       if (ret < 0)
+               return dev_err_probe(&pdev->dev, ret,
+                                    "failed to set adc clk rate\n");
 
        platform_set_drvdata(pdev, indio_dev);