arm: dts: imx95-15x15-evk: Add -u-boot.dtsi for SPL and binman

Add -u-boot.dtsi for iMX95 15x15 EVK used by SPL and binman.
iMX95 15x15 EVK uses LPDDR4X which needs dedicated DDR FW.

Signed-off-by: Ye Li <ye.li@nxp.com>

diff --git a/arch/arm/dts/imx95-15x15-evk-u-boot.dtsi b/arch/arm/dts/imx95-15x15-evk-u-boot.dtsi
new file mode 100644 (file)
index 0000000..514dd72
--- /dev/null
+++ b/arch/arm/dts/imx95-15x15-evk-u-boot.dtsi
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2025 NXP
+ */
+
+#include "imx95-u-boot.dtsi"
+
+/ {
+       aliases {
+               pci0 = &netc_bus0;
+               pci1 = &netc_bus1;
+       };
+};
+
+&{/binman/m33-oei-ddrfw/imx-lpddr/imx-lpddr-imem} {
+       filename = "lpddr4x_imem_v202409.bin";
+};
+
+&{/binman/m33-oei-ddrfw/imx-lpddr/imx-lpddr-dmem} {
+       filename = "lpddr4x_dmem_v202409.bin";
+};
+
+&{/binman/m33-oei-ddrfw/imx-lpddr-qb/imx-lpddr-imem-qb} {
+       filename = "lpddr4x_imem_qb_v202409.bin";
+};
+
+&{/binman/m33-oei-ddrfw/imx-lpddr-qb/imx-lpddr-dmem-qb} {
+       filename = "lpddr4x_dmem_qb_v202409.bin";
+};
+
+&lpuart1 {
+       bootph-pre-ram;
+};
+
+&reg_usdhc2_vmmc {
+       bootph-pre-ram;
+};
+
+&usdhc1 {
+       bootph-pre-ram;
+};
+
+&usdhc2 {
+       bootph-pre-ram;
+};
+
+&wdog3 {
+       status = "disabled";
+};
+
+&pinctrl_uart1 {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc1 {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc1_100mhz {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc1_200mhz {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc2 {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc2_100mhz {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc2_200mhz {
+       bootph-pre-ram;
+};
+
+&pinctrl_usdhc2_gpio {
+       bootph-pre-ram;
+};
+
+&pinctrl_reg_usdhc2_vmmc {
+       bootph-pre-ram;
+};