spi: cadence_qspi: Add Octal support

This patch adds Octal read support by setting the octal instruction
type in the read instruction register if controller supports it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index c96476039b128e86f67fb7c2874efbbc83452ade..7b932b695fcc3a979085a72adfcc0b13ccdbd8a6 100644 (file)
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -41,6 +41,7 @@
 #define CQSPI_INST_TYPE_SINGLE                 0
 #define CQSPI_INST_TYPE_DUAL                   1
 #define CQSPI_INST_TYPE_QUAD                   2
+#define CQSPI_INST_TYPE_OCTAL                  3
 
 #define CQSPI_STIG_DATA_LEN_MAX                        8
 
@@ -646,6 +647,11 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat,
                /* Instruction and address at DQ0, data at DQ0-3. */
                rd_reg |= CQSPI_INST_TYPE_QUAD << CQSPI_REG_RD_INSTR_TYPE_DATA_LSB;
 
+       if (rx_width & SPI_RX_OCTAL)
+               /* Instruction and address at DQ0, data at DQ0-7. */
+               rd_reg |= CQSPI_INST_TYPE_OCTAL <<
+                         CQSPI_REG_RD_INSTR_TYPE_DATA_LSB;
+
        /* Get address */
        addr_value = cadence_qspi_apb_cmd2addr(&cmdbuf[1], addr_bytes);
        writel(addr_value, plat->regbase + CQSPI_REG_INDIRECTRDSTARTADDR);