]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
clk: at91: remove default values for PMC_PLL_ACR
authorManikandan Muralidharan <manikandan.m@microchip.com>
Tue, 23 Sep 2025 09:58:18 +0000 (15:28 +0530)
committerEugen Hristev <eugen.hristev@linaro.org>
Fri, 17 Oct 2025 09:33:46 +0000 (12:33 +0300)
Remove default values for PMC PLL Analog Control Register(ACR) as the
values are specific for each SoC and PLL, so load them from PLL
characteristics structure

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
drivers/clk/at91/clk-sam9x60-pll.c
include/linux/clk/at91_pmc.h

index 65be2775ac323b89929d5485703e3fd86779dbd2..66f014727390ade235446230a68fcbe92c718735 100644 (file)
@@ -183,11 +183,8 @@ static int sam9x60_frac_pll_enable(struct clk *clk)
                        AT91_PMC_PLL_UPDT_ID_MSK,
                        AT91_PMC_PLL_UPDT_STUPTIM(0x3f) | pll->id);
 
-       /* Recommended value for AT91_PMC_PLL_ACR */
-       if (pll->characteristics->upll)
-               val = AT91_PMC_PLL_ACR_DEFAULT_UPLL;
-       else
-               val = AT91_PMC_PLL_ACR_DEFAULT_PLLA;
+       /* Load recommended value for PMC_PLL_ACR */
+       val = pll->characteristics->acr;
        pmc_write(base, AT91_PMC_PLL_ACR, val);
 
        if (pll->characteristics->upll) {
index ee39e72e2b39145cec70fd349fb1853f98b7a6be..a48b15e049a3ae90d984e0ac51b25c498eb273a1 100644 (file)
@@ -45,8 +45,6 @@
 #define        AT91_PMC_PCSR           0x18                    /* Peripheral Clock Status Register */
 
 #define AT91_PMC_PLL_ACR       0x18                    /* PLL Analog Control Register [for SAM9X60] */
-#define                AT91_PMC_PLL_ACR_DEFAULT_UPLL   0x12020010UL    /* Default PLL ACR value for UPLL */
-#define                AT91_PMC_PLL_ACR_DEFAULT_PLLA   0x00020010UL    /* Default PLL ACR value for PLLA */
 #define                AT91_PMC_PLL_ACR_UTMIVR         (1 << 12)       /* UPLL Voltage regulator Control */
 #define                AT91_PMC_PLL_ACR_UTMIBG         (1 << 13)       /* UPLL Bandgap Control */