watchdog: it87_wdt: add PWRGD enable quirk for Qotom QCML04

[ Upstream commit 43439076383a7611300334d1357c0f8883f40816 ]

For the watchdog timer to work properly on the QCML04 board we need to
set PWRGD enable in the Environment Controller Configuration Registers
Special Configuration Register 1 when it is not already set, this may
be the case when the watchdog is not enabled from within the BIOS.

Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20241025063441.3494837-1-james.hilliard1@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/watchdog/it87_wdt.c b/drivers/watchdog/it87_wdt.c
index 6340ca058f8904ed06c92f35e22c956a0ae7c30b..da9e24e4a8b60a02b513aa169a6a9a5d4188dbe2 100644 (file)
--- a/drivers/watchdog/it87_wdt.c
+++ b/drivers/watchdog/it87_wdt.c
@@ -20,6 +20,8 @@
 
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
+#include <linux/bits.h>
+#include <linux/dmi.h>
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
@@ -40,6 +42,7 @@
 #define VAL            0x2f
 
 /* Logical device Numbers LDN */
+#define EC             0x04
 #define GPIO           0x07
 
 /* Configuration Registers and Functions */
@@ -71,6 +74,12 @@
 #define IT8784_ID      0x8784
 #define IT8786_ID      0x8786
 
+/* Environment Controller Configuration Registers LDN=0x04 */
+#define SCR1           0xfa
+
+/* Environment Controller Bits SCR1 */
+#define WDT_PWRGD      0x20
+
 /* GPIO Configuration Registers LDN=0x07 */
 #define WDTCTRL                0x71
 #define WDTCFG         0x72
@@ -241,6 +250,21 @@ static int wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
        return ret;
 }
 
+enum {
+       IT87_WDT_OUTPUT_THROUGH_PWRGD   = BIT(0),
+};
+
+static const struct dmi_system_id it87_quirks[] = {
+       {
+               /* Qotom Q30900P (IT8786) */
+               .matches = {
+                       DMI_EXACT_MATCH(DMI_BOARD_NAME, "QCML04"),
+               },
+               .driver_data = (void *)IT87_WDT_OUTPUT_THROUGH_PWRGD,
+       },
+       {}
+};
+
 static const struct watchdog_info ident = {
        .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
        .firmware_version = 1,
@@ -262,8 +286,10 @@ static struct watchdog_device wdt_dev = {
 
 static int __init it87_wdt_init(void)
 {
+       const struct dmi_system_id *dmi_id;
        u8  chip_rev;
        u8 ctrl;
+       int quirks = 0;
        int rc;
 
        rc = superio_enter();
@@ -274,6 +300,10 @@ static int __init it87_wdt_init(void)
        chip_rev  = superio_inb(CHIPREV) & 0x0f;
        superio_exit();
 
+       dmi_id = dmi_first_match(it87_quirks);
+       if (dmi_id)
+               quirks = (long)dmi_id->driver_data;
+
        switch (chip_type) {
        case IT8702_ID:
                max_units = 255;
@@ -334,6 +364,15 @@ static int __init it87_wdt_init(void)
                superio_outb(0x00, WDTCTRL);
        }
 
+       if (quirks & IT87_WDT_OUTPUT_THROUGH_PWRGD) {
+               superio_select(EC);
+               ctrl = superio_inb(SCR1);
+               if (!(ctrl & WDT_PWRGD)) {
+                       ctrl |= WDT_PWRGD;
+                       superio_outb(ctrl, SCR1);
+               }
+       }
+
        superio_exit();
 
        if (timeout < 1 || timeout > max_units * 60) {