--- /dev/null
+From foo@baz Mon May 17 01:35:13 PM CEST 2021
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 10 May 2021 06:21:08 -0700
+Subject: ARM: 9011/1: centralize phys-to-virt conversion of DT/ATAGS address
+To: stable@vger.kernel.org
+Cc: Ard Biesheuvel <ardb@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Nicolas Pitre <nico@fluxnic.net>, Russell King <rmk+kernel@armlinux.org.uk>, Florian Fainelli <f.fainelli@gmail.com>, Jonathan Corbet <corbet@lwn.net>, Russell King <linux@armlinux.org.uk>, Mike Rapoport <rppt@kernel.org>, Andrew Morton <akpm@linux-foundation.org>, Nick Desaulniers <ndesaulniers@google.com>, Joe Perches <joe@perches.com>, Max Filippov <jcmvbkbc@gmail.com>, Tian Tao <tiantao6@hisilicon.com>, linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list), linux-arm-kernel@lists.infradead.org (moderated list:ARM PORT), Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Sasha Levin <sashal@kernel.org>
+Message-ID: <20210510132111.1690943-2-f.fainelli@gmail.com>
+
+From: Ard Biesheuvel <ardb@kernel.org>
+
+commit e9a2f8b599d0bc22a1b13e69527246ac39c697b4 upstream
+
+Before moving the DT mapping out of the linear region, let's prepare
+for this change by removing all the phys-to-virt translations of the
+__atags_pointer variable, and perform this translation only once at
+setup time.
+
+Tested-by: Linus Walleij <linus.walleij@linaro.org>
+Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
+Acked-by: Nicolas Pitre <nico@fluxnic.net>
+Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm/include/asm/prom.h | 4 ++--
+ arch/arm/kernel/atags.h | 4 ++--
+ arch/arm/kernel/atags_parse.c | 6 +++---
+ arch/arm/kernel/devtree.c | 6 +++---
+ arch/arm/kernel/setup.c | 14 +++++++++-----
+ arch/arm/mm/mmu.c | 4 ++--
+ 6 files changed, 21 insertions(+), 17 deletions(-)
+
+--- a/arch/arm/include/asm/prom.h
++++ b/arch/arm/include/asm/prom.h
+@@ -9,12 +9,12 @@
+
+ #ifdef CONFIG_OF
+
+-extern const struct machine_desc *setup_machine_fdt(unsigned int dt_phys);
++extern const struct machine_desc *setup_machine_fdt(void *dt_virt);
+ extern void __init arm_dt_init_cpu_maps(void);
+
+ #else /* CONFIG_OF */
+
+-static inline const struct machine_desc *setup_machine_fdt(unsigned int dt_phys)
++static inline const struct machine_desc *setup_machine_fdt(void *dt_virt)
+ {
+ return NULL;
+ }
+--- a/arch/arm/kernel/atags.h
++++ b/arch/arm/kernel/atags.h
+@@ -2,11 +2,11 @@
+ void convert_to_tag_list(struct tag *tags);
+
+ #ifdef CONFIG_ATAGS
+-const struct machine_desc *setup_machine_tags(phys_addr_t __atags_pointer,
++const struct machine_desc *setup_machine_tags(void *__atags_vaddr,
+ unsigned int machine_nr);
+ #else
+ static inline const struct machine_desc * __init __noreturn
+-setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr)
++setup_machine_tags(void *__atags_vaddr, unsigned int machine_nr)
+ {
+ early_print("no ATAGS support: can't continue\n");
+ while (true);
+--- a/arch/arm/kernel/atags_parse.c
++++ b/arch/arm/kernel/atags_parse.c
+@@ -174,7 +174,7 @@ static void __init squash_mem_tags(struc
+ }
+
+ const struct machine_desc * __init
+-setup_machine_tags(phys_addr_t __atags_pointer, unsigned int machine_nr)
++setup_machine_tags(void *atags_vaddr, unsigned int machine_nr)
+ {
+ struct tag *tags = (struct tag *)&default_tags;
+ const struct machine_desc *mdesc = NULL, *p;
+@@ -195,8 +195,8 @@ setup_machine_tags(phys_addr_t __atags_p
+ if (!mdesc)
+ return NULL;
+
+- if (__atags_pointer)
+- tags = phys_to_virt(__atags_pointer);
++ if (atags_vaddr)
++ tags = atags_vaddr;
+ else if (mdesc->atag_offset)
+ tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
+
+--- a/arch/arm/kernel/devtree.c
++++ b/arch/arm/kernel/devtree.c
+@@ -203,12 +203,12 @@ static const void * __init arch_get_next
+
+ /**
+ * setup_machine_fdt - Machine setup when an dtb was passed to the kernel
+- * @dt_phys: physical address of dt blob
++ * @dt_virt: virtual address of dt blob
+ *
+ * If a dtb was passed to the kernel in r2, then use it to choose the
+ * correct machine_desc and to setup the system.
+ */
+-const struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
++const struct machine_desc * __init setup_machine_fdt(void *dt_virt)
+ {
+ const struct machine_desc *mdesc, *mdesc_best = NULL;
+
+@@ -221,7 +221,7 @@ const struct machine_desc * __init setup
+ mdesc_best = &__mach_desc_GENERIC_DT;
+ #endif
+
+- if (!dt_phys || !early_init_dt_verify(phys_to_virt(dt_phys)))
++ if (!dt_virt || !early_init_dt_verify(dt_virt))
+ return NULL;
+
+ mdesc = of_flat_dt_match_machine(mdesc_best, arch_get_next_mach);
+--- a/arch/arm/kernel/setup.c
++++ b/arch/arm/kernel/setup.c
+@@ -89,6 +89,7 @@ unsigned int cacheid __read_mostly;
+ EXPORT_SYMBOL(cacheid);
+
+ unsigned int __atags_pointer __initdata;
++void *atags_vaddr __initdata;
+
+ unsigned int system_rev;
+ EXPORT_SYMBOL(system_rev);
+@@ -1081,19 +1082,22 @@ void __init hyp_mode_check(void)
+
+ void __init setup_arch(char **cmdline_p)
+ {
+- const struct machine_desc *mdesc;
++ const struct machine_desc *mdesc = NULL;
++
++ if (__atags_pointer)
++ atags_vaddr = phys_to_virt(__atags_pointer);
+
+ setup_processor();
+- mdesc = setup_machine_fdt(__atags_pointer);
++ if (atags_vaddr)
++ mdesc = setup_machine_fdt(atags_vaddr);
+ if (!mdesc)
+- mdesc = setup_machine_tags(__atags_pointer, __machine_arch_type);
++ mdesc = setup_machine_tags(atags_vaddr, __machine_arch_type);
+ if (!mdesc) {
+ early_print("\nError: invalid dtb and unrecognized/unsupported machine ID\n");
+ early_print(" r1=0x%08x, r2=0x%08x\n", __machine_arch_type,
+ __atags_pointer);
+ if (__atags_pointer)
+- early_print(" r2[]=%*ph\n", 16,
+- phys_to_virt(__atags_pointer));
++ early_print(" r2[]=%*ph\n", 16, atags_vaddr);
+ dump_machine_table();
+ }
+
+--- a/arch/arm/mm/mmu.c
++++ b/arch/arm/mm/mmu.c
+@@ -1489,7 +1489,7 @@ static void __init map_lowmem(void)
+ }
+
+ #ifdef CONFIG_ARM_PV_FIXUP
+-extern unsigned long __atags_pointer;
++extern void *atags_vaddr;
+ typedef void pgtables_remap(long long offset, unsigned long pgd, void *bdata);
+ pgtables_remap lpae_pgtables_remap_asm;
+
+@@ -1520,7 +1520,7 @@ static void __init early_paging_init(con
+ */
+ lpae_pgtables_remap = (pgtables_remap *)(unsigned long)__pa(lpae_pgtables_remap_asm);
+ pa_pgd = __pa(swapper_pg_dir);
+- boot_data = __va(__atags_pointer);
++ boot_data = atags_vaddr;
+ barrier();
+
+ pr_info("Switching physical address space to 0x%08llx\n",
--- /dev/null
+From foo@baz Mon May 17 01:35:13 PM CEST 2021
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 10 May 2021 06:21:09 -0700
+Subject: ARM: 9012/1: move device tree mapping out of linear region
+To: stable@vger.kernel.org
+Cc: Ard Biesheuvel <ardb@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Nicolas Pitre <nico@fluxnic.net>, Russell King <rmk+kernel@armlinux.org.uk>, Florian Fainelli <f.fainelli@gmail.com>, Jonathan Corbet <corbet@lwn.net>, Russell King <linux@armlinux.org.uk>, Mike Rapoport <rppt@kernel.org>, Andrew Morton <akpm@linux-foundation.org>, Nick Desaulniers <ndesaulniers@google.com>, Joe Perches <joe@perches.com>, Max Filippov <jcmvbkbc@gmail.com>, Tian Tao <tiantao6@hisilicon.com>, linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list), linux-arm-kernel@lists.infradead.org (moderated list:ARM PORT), Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Sasha Levin <sashal@kernel.org>
+Message-ID: <20210510132111.1690943-3-f.fainelli@gmail.com>
+
+From: Ard Biesheuvel <ardb@kernel.org>
+
+commit 7a1be318f5795cb66fa0dc86b3ace427fe68057f upstream
+
+On ARM, setting up the linear region is tricky, given the constraints
+around placement and alignment of the memblocks, and how the kernel
+itself as well as the DT are placed in physical memory.
+
+Let's simplify matters a bit, by moving the device tree mapping to the
+top of the address space, right between the end of the vmalloc region
+and the start of the the fixmap region, and create a read-only mapping
+for it that is independent of the size of the linear region, and how it
+is organized.
+
+Since this region was formerly used as a guard region, which will now be
+populated fully on LPAE builds by this read-only mapping (which will
+still be able to function as a guard region for stray writes), bump the
+start of the [underutilized] fixmap region by 512 KB as well, to ensure
+that there is always a proper guard region here. Doing so still leaves
+ample room for the fixmap space, even with NR_CPUS set to its maximum
+value of 32.
+
+Tested-by: Linus Walleij <linus.walleij@linaro.org>
+Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
+Reviewed-by: Nicolas Pitre <nico@fluxnic.net>
+Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ Documentation/arm/memory.rst | 7 ++++++-
+ arch/arm/include/asm/fixmap.h | 2 +-
+ arch/arm/include/asm/memory.h | 5 +++++
+ arch/arm/kernel/head.S | 5 ++---
+ arch/arm/kernel/setup.c | 11 ++++++++---
+ arch/arm/mm/init.c | 1 -
+ arch/arm/mm/mmu.c | 20 ++++++++++++++------
+ arch/arm/mm/pv-fixup-asm.S | 4 ++--
+ 8 files changed, 38 insertions(+), 17 deletions(-)
+
+--- a/Documentation/arm/memory.rst
++++ b/Documentation/arm/memory.rst
+@@ -45,9 +45,14 @@ fffe8000 fffeffff DTCM mapping area for
+ fffe0000 fffe7fff ITCM mapping area for platforms with
+ ITCM mounted inside the CPU.
+
+-ffc00000 ffefffff Fixmap mapping region. Addresses provided
++ffc80000 ffefffff Fixmap mapping region. Addresses provided
+ by fix_to_virt() will be located here.
+
++ffc00000 ffc7ffff Guard region
++
++ff800000 ffbfffff Permanent, fixed read-only mapping of the
++ firmware provided DT blob
++
+ fee00000 feffffff Mapping of PCI I/O space. This is a static
+ mapping within the vmalloc space.
+
+--- a/arch/arm/include/asm/fixmap.h
++++ b/arch/arm/include/asm/fixmap.h
+@@ -2,7 +2,7 @@
+ #ifndef _ASM_FIXMAP_H
+ #define _ASM_FIXMAP_H
+
+-#define FIXADDR_START 0xffc00000UL
++#define FIXADDR_START 0xffc80000UL
+ #define FIXADDR_END 0xfff00000UL
+ #define FIXADDR_TOP (FIXADDR_END - PAGE_SIZE)
+
+--- a/arch/arm/include/asm/memory.h
++++ b/arch/arm/include/asm/memory.h
+@@ -67,6 +67,10 @@
+ */
+ #define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff))
+
++#define FDT_FIXED_BASE UL(0xff800000)
++#define FDT_FIXED_SIZE (2 * PMD_SIZE)
++#define FDT_VIRT_ADDR(physaddr) ((void *)(FDT_FIXED_BASE | (physaddr) % PMD_SIZE))
++
+ #if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
+ /*
+ * Allow 16MB-aligned ioremap pages
+@@ -107,6 +111,7 @@ extern unsigned long vectors_base;
+ #define MODULES_VADDR PAGE_OFFSET
+
+ #define XIP_VIRT_ADDR(physaddr) (physaddr)
++#define FDT_VIRT_ADDR(physaddr) ((void *)(physaddr))
+
+ #endif /* !CONFIG_MMU */
+
+--- a/arch/arm/kernel/head.S
++++ b/arch/arm/kernel/head.S
+@@ -275,9 +275,8 @@ __create_page_tables:
+ */
+ mov r0, r2, lsr #SECTION_SHIFT
+ movs r0, r0, lsl #SECTION_SHIFT
+- subne r3, r0, r8
+- addne r3, r3, #PAGE_OFFSET
+- addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
++ ldrne r3, =FDT_FIXED_BASE >> (SECTION_SHIFT - PMD_ORDER)
++ addne r3, r3, r4
+ orrne r6, r7, r0
+ strne r6, [r3], #1 << PMD_ORDER
+ addne r6, r6, #1 << SECTION_SHIFT
+--- a/arch/arm/kernel/setup.c
++++ b/arch/arm/kernel/setup.c
+@@ -18,6 +18,7 @@
+ #include <linux/of_platform.h>
+ #include <linux/init.h>
+ #include <linux/kexec.h>
++#include <linux/libfdt.h>
+ #include <linux/of_fdt.h>
+ #include <linux/cpu.h>
+ #include <linux/interrupt.h>
+@@ -89,7 +90,6 @@ unsigned int cacheid __read_mostly;
+ EXPORT_SYMBOL(cacheid);
+
+ unsigned int __atags_pointer __initdata;
+-void *atags_vaddr __initdata;
+
+ unsigned int system_rev;
+ EXPORT_SYMBOL(system_rev);
+@@ -1083,13 +1083,18 @@ void __init hyp_mode_check(void)
+ void __init setup_arch(char **cmdline_p)
+ {
+ const struct machine_desc *mdesc = NULL;
++ void *atags_vaddr = NULL;
+
+ if (__atags_pointer)
+- atags_vaddr = phys_to_virt(__atags_pointer);
++ atags_vaddr = FDT_VIRT_ADDR(__atags_pointer);
+
+ setup_processor();
+- if (atags_vaddr)
++ if (atags_vaddr) {
+ mdesc = setup_machine_fdt(atags_vaddr);
++ if (mdesc)
++ memblock_reserve(__atags_pointer,
++ fdt_totalsize(atags_vaddr));
++ }
+ if (!mdesc)
+ mdesc = setup_machine_tags(atags_vaddr, __machine_arch_type);
+ if (!mdesc) {
+--- a/arch/arm/mm/init.c
++++ b/arch/arm/mm/init.c
+@@ -223,7 +223,6 @@ void __init arm_memblock_init(const stru
+ if (mdesc->reserve)
+ mdesc->reserve();
+
+- early_init_fdt_reserve_self();
+ early_init_fdt_scan_reserved_mem();
+
+ /* reserve memory for DMA contiguous allocations */
+--- a/arch/arm/mm/mmu.c
++++ b/arch/arm/mm/mmu.c
+@@ -39,6 +39,8 @@
+ #include "mm.h"
+ #include "tcm.h"
+
++extern unsigned long __atags_pointer;
++
+ /*
+ * empty_zero_page is a special page that is used for
+ * zero-initialized data and COW.
+@@ -946,7 +948,7 @@ static void __init create_mapping(struct
+ return;
+ }
+
+- if ((md->type == MT_DEVICE || md->type == MT_ROM) &&
++ if (md->type == MT_DEVICE &&
+ md->virtual >= PAGE_OFFSET && md->virtual < FIXADDR_START &&
+ (md->virtual < VMALLOC_START || md->virtual >= VMALLOC_END)) {
+ pr_warn("BUG: mapping for 0x%08llx at 0x%08lx out of vmalloc space\n",
+@@ -1333,6 +1335,15 @@ static void __init devicemaps_init(const
+ for (addr = VMALLOC_START; addr < (FIXADDR_TOP & PMD_MASK); addr += PMD_SIZE)
+ pmd_clear(pmd_off_k(addr));
+
++ if (__atags_pointer) {
++ /* create a read-only mapping of the device tree */
++ map.pfn = __phys_to_pfn(__atags_pointer & SECTION_MASK);
++ map.virtual = FDT_FIXED_BASE;
++ map.length = FDT_FIXED_SIZE;
++ map.type = MT_ROM;
++ create_mapping(&map);
++ }
++
+ /*
+ * Map the kernel if it is XIP.
+ * It is always first in the modulearea.
+@@ -1489,8 +1500,7 @@ static void __init map_lowmem(void)
+ }
+
+ #ifdef CONFIG_ARM_PV_FIXUP
+-extern void *atags_vaddr;
+-typedef void pgtables_remap(long long offset, unsigned long pgd, void *bdata);
++typedef void pgtables_remap(long long offset, unsigned long pgd);
+ pgtables_remap lpae_pgtables_remap_asm;
+
+ /*
+@@ -1503,7 +1513,6 @@ static void __init early_paging_init(con
+ unsigned long pa_pgd;
+ unsigned int cr, ttbcr;
+ long long offset;
+- void *boot_data;
+
+ if (!mdesc->pv_fixup)
+ return;
+@@ -1520,7 +1529,6 @@ static void __init early_paging_init(con
+ */
+ lpae_pgtables_remap = (pgtables_remap *)(unsigned long)__pa(lpae_pgtables_remap_asm);
+ pa_pgd = __pa(swapper_pg_dir);
+- boot_data = atags_vaddr;
+ barrier();
+
+ pr_info("Switching physical address space to 0x%08llx\n",
+@@ -1556,7 +1564,7 @@ static void __init early_paging_init(con
+ * needs to be assembly. It's fairly simple, as we're using the
+ * temporary tables setup by the initial assembly code.
+ */
+- lpae_pgtables_remap(offset, pa_pgd, boot_data);
++ lpae_pgtables_remap(offset, pa_pgd);
+
+ /* Re-enable the caches and cacheable TLB walks */
+ asm volatile("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr));
+--- a/arch/arm/mm/pv-fixup-asm.S
++++ b/arch/arm/mm/pv-fixup-asm.S
+@@ -39,8 +39,8 @@ ENTRY(lpae_pgtables_remap_asm)
+
+ /* Update level 2 entries for the boot data */
+ add r7, r2, #0x1000
+- add r7, r7, r3, lsr #SECTION_SHIFT - L2_ORDER
+- bic r7, r7, #(1 << L2_ORDER) - 1
++ movw r3, #FDT_FIXED_BASE >> (SECTION_SHIFT - L2_ORDER)
++ add r7, r7, r3
+ ldrd r4, r5, [r7]
+ adds r4, r4, r0
+ adc r5, r5, r1
--- /dev/null
+From foo@baz Mon May 17 01:35:13 PM CEST 2021
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 10 May 2021 06:21:10 -0700
+Subject: ARM: 9020/1: mm: use correct section size macro to describe the FDT virtual address
+To: stable@vger.kernel.org
+Cc: Ard Biesheuvel <ardb@kernel.org>, Joel Stanley <joel@jms.id.au>, Marek Szyprowski <m.szyprowski@samsung.com>, Russell King <rmk+kernel@armlinux.org.uk>, Florian Fainelli <f.fainelli@gmail.com>, Jonathan Corbet <corbet@lwn.net>, Russell King <linux@armlinux.org.uk>, Nicolas Pitre <nico@fluxnic.net>, Linus Walleij <linus.walleij@linaro.org>, Mike Rapoport <rppt@kernel.org>, Andrew Morton <akpm@linux-foundation.org>, Nick Desaulniers <ndesaulniers@google.com>, Joe Perches <joe@perches.com>, Max Filippov <jcmvbkbc@gmail.com>, Tian Tao <tiantao6@hisilicon.com>, linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list), linux-arm-kernel@lists.infradead.org (moderated list:ARM PORT), Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Sasha Levin <sashal@kernel.org>
+Message-ID: <20210510132111.1690943-4-f.fainelli@gmail.com>
+
+From: Ard Biesheuvel <ardb@kernel.org>
+
+commit fc2933c133744305236793025b00c2f7d258b687 upstream
+
+Commit
+
+ 149a3ffe62b9dbc3 ("9012/1: move device tree mapping out of linear region")
+
+created a permanent, read-only section mapping of the device tree blob
+provided by the firmware, and added a set of macros to get the base and
+size of the virtually mapped FDT based on the physical address. However,
+while the mapping code uses the SECTION_SIZE macro correctly, the macros
+use PMD_SIZE instead, which means something entirely different on ARM when
+using short descriptors, and is therefore not the right quantity to use
+here. So replace PMD_SIZE with SECTION_SIZE. While at it, change the names
+of the macro and its parameter to clarify that it returns the virtual
+address of the start of the FDT, based on the physical address in memory.
+
+Tested-by: Joel Stanley <joel@jms.id.au>
+Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
+Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm/include/asm/memory.h | 6 +++---
+ arch/arm/kernel/setup.c | 2 +-
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+--- a/arch/arm/include/asm/memory.h
++++ b/arch/arm/include/asm/memory.h
+@@ -68,8 +68,8 @@
+ #define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff))
+
+ #define FDT_FIXED_BASE UL(0xff800000)
+-#define FDT_FIXED_SIZE (2 * PMD_SIZE)
+-#define FDT_VIRT_ADDR(physaddr) ((void *)(FDT_FIXED_BASE | (physaddr) % PMD_SIZE))
++#define FDT_FIXED_SIZE (2 * SECTION_SIZE)
++#define FDT_VIRT_BASE(physbase) ((void *)(FDT_FIXED_BASE | (physbase) % SECTION_SIZE))
+
+ #if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
+ /*
+@@ -111,7 +111,7 @@ extern unsigned long vectors_base;
+ #define MODULES_VADDR PAGE_OFFSET
+
+ #define XIP_VIRT_ADDR(physaddr) (physaddr)
+-#define FDT_VIRT_ADDR(physaddr) ((void *)(physaddr))
++#define FDT_VIRT_BASE(physbase) ((void *)(physbase))
+
+ #endif /* !CONFIG_MMU */
+
+--- a/arch/arm/kernel/setup.c
++++ b/arch/arm/kernel/setup.c
+@@ -1086,7 +1086,7 @@ void __init setup_arch(char **cmdline_p)
+ void *atags_vaddr = NULL;
+
+ if (__atags_pointer)
+- atags_vaddr = FDT_VIRT_ADDR(__atags_pointer);
++ atags_vaddr = FDT_VIRT_BASE(__atags_pointer);
+
+ setup_processor();
+ if (atags_vaddr) {
--- /dev/null
+From foo@baz Mon May 17 01:35:13 PM CEST 2021
+From: Florian Fainelli <f.fainelli@gmail.com>
+Date: Mon, 10 May 2021 06:21:11 -0700
+Subject: ARM: 9027/1: head.S: explicitly map DT even if it lives in the first physical section
+To: stable@vger.kernel.org
+Cc: Ard Biesheuvel <ardb@kernel.org>, "kernelci.org bot" <bot@kernelci.org>, Linus Walleij <linus.walleij@linaro.org>, Russell King <rmk+kernel@armlinux.org.uk>, Florian Fainelli <f.fainelli@gmail.com>, Jonathan Corbet <corbet@lwn.net>, Russell King <linux@armlinux.org.uk>, Nicolas Pitre <nico@fluxnic.net>, Mike Rapoport <rppt@kernel.org>, Andrew Morton <akpm@linux-foundation.org>, Nick Desaulniers <ndesaulniers@google.com>, Joe Perches <joe@perches.com>, Max Filippov <jcmvbkbc@gmail.com>, Tian Tao <tiantao6@hisilicon.com>, linux-doc@vger.kernel.org (open list:DOCUMENTATION), linux-kernel@vger.kernel.org (open list), linux-arm-kernel@lists.infradead.org (moderated list:ARM PORT), Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Sasha Levin <sashal@kernel.org>
+Message-ID: <20210510132111.1690943-5-f.fainelli@gmail.com>
+
+From: Ard Biesheuvel <ardb@kernel.org>
+
+commit 10fce53c0ef8f6e79115c3d9e0d7ea1338c3fa37 upstream
+
+The early ATAGS/DT mapping code uses SECTION_SHIFT to mask low order
+bits of R2, and decides that no ATAGS/DTB were provided if the resulting
+value is 0x0.
+
+This means that on systems where DRAM starts at 0x0 (such as Raspberry
+Pi), no explicit mapping of the DT will be created if R2 points into the
+first 1 MB section of memory. This was not a problem before, because the
+decompressed kernel is loaded at the base of DRAM and mapped using
+sections as well, and so as long as the DT is referenced via a virtual
+address that uses the same translation (the linear map, in this case),
+things work fine.
+
+However, commit 7a1be318f579 ("9012/1: move device tree mapping out of
+linear region") changes this, and now the DT is referenced via a virtual
+address that is disjoint from the linear mapping of DRAM, and so we need
+the early code to create the DT mapping unconditionally.
+
+So let's create the early DT mapping for any value of R2 != 0x0.
+
+Reported-by: "kernelci.org bot" <bot@kernelci.org>
+Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm/kernel/head.S | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/kernel/head.S
++++ b/arch/arm/kernel/head.S
+@@ -274,10 +274,10 @@ __create_page_tables:
+ * We map 2 sections in case the ATAGs/DTB crosses a section boundary.
+ */
+ mov r0, r2, lsr #SECTION_SHIFT
+- movs r0, r0, lsl #SECTION_SHIFT
++ cmp r2, #0
+ ldrne r3, =FDT_FIXED_BASE >> (SECTION_SHIFT - PMD_ORDER)
+ addne r3, r3, r4
+- orrne r6, r7, r0
++ orrne r6, r7, r0, lsl #SECTION_SHIFT
+ strne r6, [r3], #1 << PMD_ORDER
+ addne r6, r6, #1 << SECTION_SHIFT
+ strne r6, [r3]
mips-avoid-handcoded-divu-in-__div64_32-altogether.patch
clocksource-drivers-timer-ti-dm-prepare-to-handle-dra7-timer-wrap-issue.patch
clocksource-drivers-timer-ti-dm-handle-dra7-timer-wrap-errata-i940.patch
+arm-9011-1-centralize-phys-to-virt-conversion-of-dt-atags-address.patch
+arm-9012-1-move-device-tree-mapping-out-of-linear-region.patch
+arm-9020-1-mm-use-correct-section-size-macro-to-describe-the-fdt-virtual-address.patch
+arm-9027-1-head.s-explicitly-map-dt-even-if-it-lives-in-the-first-physical-section.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
