spi: cadence_qspi: Disable the DAC mode in indirect read

Hang has been observed on QEMU, as it starts with indac
read and fills sram, but after dma is triggered, it tries
dac read instead (based on priority) which gets blocked.
Disable the DAC mode in indirect DMA read and enable back
for writes as DAC mode is used.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Tested-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20250430050923.135256-1-venkatesh.abbarapu@amd.com

diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c
index a00642d09d344ad5fccff86798b74430164b9c70..e6f4ba49e7728aaa8fb8d7e180986c96e6b0f13f 100644 (file)
--- a/drivers/spi/cadence_ospi_versal.c
+++ b/drivers/spi/cadence_ospi_versal.c
@@ -35,6 +35,10 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv,
        bytes_to_dma = n_rx - rx_rem;
 
        if (bytes_to_dma) {
+               if (priv->use_dac_mode)
+                       clrbits_le32(priv->regbase + CQSPI_REG_CONFIG,
+                                    CQSPI_REG_CONFIG_DIRECT);
+
                cadence_qspi_apb_enable_linear_mode(false);
                reg = readl(priv->regbase + CQSPI_REG_CONFIG);
                reg |= CQSPI_REG_CONFIG_ENBL_DMA;
@@ -125,6 +129,9 @@ int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv,
                memcpy(rxbuf, rxbuf + 1, n_rx - 1);
        }
 
+       if (priv->use_dac_mode)
+               cadence_qspi_apb_dac_mode_enable(priv->regbase);
+
        return 0;
 }