drm/amd/display: Fix wrong index for DCN401 cursor offload

[Why]
Payloads are ignored because the wrong index is written as part of the
pipe update implementation for DCN401.

[How]
Align it to the DCN35 implementation and ensure the + 1 is added.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Wayne Lin <wayne.lin@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
index 23ecab4bcbba85b3adc0e65ed0f77f37cf885208..b9c357a4070742196b18021b00e8016815296141 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
@@ -2978,7 +2978,7 @@ void dcn401_update_cursor_offload_pipe(struct dc *dc, const struct pipe_ctx *pip
                return;
 
        stream_idx = top_pipe->pipe_idx;
-       write_idx = cs->offload_streams[stream_idx].write_idx;
+       write_idx = cs->offload_streams[stream_idx].write_idx + 1; /*  new payload (+1) */
        payload_idx = write_idx % ARRAY_SIZE(cs->offload_streams[stream_idx].payloads);
 
        p = &cs->offload_streams[stream_idx].payloads[payload_idx].pipe_data[pipe->pipe_idx].dcn401;