]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
clk: qcom: gcc-sm8550: Don't park the USB RCG at registration time
authorStephen Boyd <swboyd@chromium.org>
Mon, 19 Aug 2024 23:36:27 +0000 (16:36 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 12 Sep 2024 09:11:44 +0000 (11:11 +0200)
[ Upstream commit 7b6dfa1bbe7f727315d2e05a2fc8e4cfeb779156 ]

Amit Pundir reports that audio and USB-C host mode stops working if the
gcc_usb30_prim_master_clk_src clk is registered and
clk_rcg2_shared_init() parks it on XO. Skip parking this clk at
registration time to fix those issues.

Partially revert commit 01a0a6cc8cfd ("clk: qcom: Park shared RCGs upon
registration") by skipping the parking bit for this clk, but keep the
part where we cache the config register. That's still necessary to
figure out the true parent of the clk at registration time.

Fixes: 01a0a6cc8cfd ("clk: qcom: Park shared RCGs upon registration")
Fixes: 929c75d57566 ("clk: qcom: gcc-sm8550: Mark RCGs shared where applicable")
Cc: Konrad Dybcio <konradybcio@kernel.org>
Cc: Bjorn Andersson <andersson@kernel.org>
Cc: Taniya Das <quic_tdas@quicinc.com>
Reported-by: Amit Pundir <amit.pundir@linaro.org>
Closes: https://lore.kernel.org/CAMi1Hd1KQBE4kKUdAn8E5FV+BiKzuv+8FoyWQrrTHPDoYTuhgA@mail.gmail.com
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20240819233628.2074654-3-swboyd@chromium.org
Tested-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/clk/qcom/clk-rcg.h
drivers/clk/qcom/clk-rcg2.c
drivers/clk/qcom/gcc-sm8550.c

index e6d84c8c7989c8fe9e0fa5480be9f4fea3db5fd0..84c497f361bc6b43d7dbd41d89b3a5353444b99e 100644 (file)
@@ -176,6 +176,7 @@ extern const struct clk_ops clk_byte2_ops;
 extern const struct clk_ops clk_pixel_ops;
 extern const struct clk_ops clk_gfx3d_ops;
 extern const struct clk_ops clk_rcg2_shared_ops;
+extern const struct clk_ops clk_rcg2_shared_no_init_park_ops;
 extern const struct clk_ops clk_dp_ops;
 
 struct clk_rcg_dfs_data {
index b9f2a29be927c1d69526ac2c9e61f5ebec448ed7..461f54fe5e4f1f9ea7dd8710411abaf54f89513c 100644 (file)
@@ -1182,6 +1182,36 @@ const struct clk_ops clk_rcg2_shared_ops = {
 };
 EXPORT_SYMBOL_GPL(clk_rcg2_shared_ops);
 
+static int clk_rcg2_shared_no_init_park(struct clk_hw *hw)
+{
+       struct clk_rcg2 *rcg = to_clk_rcg2(hw);
+
+       /*
+        * Read the config register so that the parent is properly mapped at
+        * registration time.
+        */
+       regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &rcg->parked_cfg);
+
+       return 0;
+}
+
+/*
+ * Like clk_rcg2_shared_ops but skip the init so that the clk frequency is left
+ * unchanged at registration time.
+ */
+const struct clk_ops clk_rcg2_shared_no_init_park_ops = {
+       .init = clk_rcg2_shared_no_init_park,
+       .enable = clk_rcg2_shared_enable,
+       .disable = clk_rcg2_shared_disable,
+       .get_parent = clk_rcg2_shared_get_parent,
+       .set_parent = clk_rcg2_shared_set_parent,
+       .recalc_rate = clk_rcg2_shared_recalc_rate,
+       .determine_rate = clk_rcg2_determine_rate,
+       .set_rate = clk_rcg2_shared_set_rate,
+       .set_rate_and_parent = clk_rcg2_shared_set_rate_and_parent,
+};
+EXPORT_SYMBOL_GPL(clk_rcg2_shared_no_init_park_ops);
+
 /* Common APIs to be used for DFS based RCGR */
 static void clk_rcg2_dfs_populate_freq(struct clk_hw *hw, unsigned int l,
                                       struct freq_tbl *f)
index bf7b7c5d4606c89f4fb25ada1280ccb9a5365c98..eb3765c57b65020b73cd473a18555d00387c332e 100644 (file)
@@ -1159,7 +1159,7 @@ static struct clk_rcg2 gcc_usb30_prim_master_clk_src = {
                .parent_data = gcc_parent_data_0,
                .num_parents = ARRAY_SIZE(gcc_parent_data_0),
                .flags = CLK_SET_RATE_PARENT,
-               .ops = &clk_rcg2_shared_ops,
+               .ops = &clk_rcg2_shared_no_init_park_ops,
        },
 };