]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
target/riscv: use riscv_csrr in riscv_csr_read
authorstove <stove@rivosinc.com>
Wed, 27 Aug 2025 20:36:17 +0000 (13:36 -0700)
committerMichael Tokarev <mjt@tls.msk.ru>
Sat, 4 Oct 2025 07:20:28 +0000 (10:20 +0300)
Commit 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC
writes a read-only CSR") changed the behavior of riscv_csrrw, which
would formerly be treated as read-only if the write mask were set to 0.

Fixes an exception being raised when accessing read-only vector CSRs
like vtype.

Fixes: 38c83e8d3a33 ("target/riscv: raise an exception when CSRRS/CSRRC writes a read-only CSR")
Signed-off-by: stove <stove@rivosinc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20250827203617.79947-1-stove@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
(cherry picked from commit cebaf7434b4af059caca053ee1ec7ed8df91c2a7)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
target/riscv/cpu.h

index 4a862da61582c07ca983218b46197b1c8b8dbeaf..dca8edff6def766c507828e06c3ff5abc0e9c732 100644 (file)
@@ -873,7 +873,7 @@ static inline void riscv_csr_write(CPURISCVState *env, int csrno,
 static inline target_ulong riscv_csr_read(CPURISCVState *env, int csrno)
 {
     target_ulong val = 0;
-    riscv_csrrw(env, csrno, &val, 0, 0, 0);
+    riscv_csrr(env, csrno, &val);
     return val;
 }