clk: mediatek: mt8195: convert CLK_XTAL to CLK_PAD_CLK26M

Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-11-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>

diff --git a/drivers/clk/mediatek/clk-mt8195.c b/drivers/clk/mediatek/clk-mt8195.c
index 28b2e2f12ac434358db75646d294131df72b2497..37cceb5f32b486102c5afd46909f2b34f8c7f65a 100644 (file)
--- a/drivers/clk/mediatek/clk-mt8195.c
+++ b/drivers/clk/mediatek/clk-mt8195.c
@@ -96,7 +96,6 @@ static const struct mtk_pll_data apmixed_plls[] = {
 };
 
 static const struct mtk_clk_tree mt8195_apmixedsys_clk_tree = {
-       .xtal_rate = 26 * MHZ,
        .pll_parent = EXT_PARENT(CLK_PAD_CLK26M),
        .ext_clk_rates = ext_clock_rates,
        .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
@@ -105,7 +104,7 @@ static const struct mtk_clk_tree mt8195_apmixedsys_clk_tree = {
 };
 
 #define FIXED_CLK0(_id, _rate) \
-       FIXED_CLK(_id, CLK_XTAL, CLK_PARENT_XTAL, _rate)
+       FIXED_CLK(_id, CLK_PAD_CLK26M, CLK_PARENT_EXT, _rate)
 
 static const struct mtk_fixed_clk top_fixed_clks[] = {
        FIXED_CLK0(CLK_TOP_IN_DGI, 165000000),
@@ -1409,7 +1408,6 @@ static const int mt8195_id_top_offs_map[] = {
 };
 
 static const struct mtk_clk_tree mt8195_topckgen_clk_tree = {
-       .xtal_rate = 26 * MHZ,
        .ext_clk_rates = ext_clock_rates,
        .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
        .id_offs_map = mt8195_id_top_offs_map,
@@ -1597,7 +1595,6 @@ static const struct mtk_gate infra_ao_clks[] = {
 };
 
 static const struct mtk_clk_tree mt8195_infracfg_ao_clk_tree = {
-       .xtal_rate = 26 * MHZ,
        .ext_clk_rates = ext_clock_rates,
        .num_ext_clks = ARRAY_SIZE(ext_clock_rates),
 };