]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
x86/resctrl: Refactor resctrl_arch_rmid_read()
authorBabu Moger <babu.moger@amd.com>
Fri, 5 Sep 2025 21:34:20 +0000 (16:34 -0500)
committerBorislav Petkov (AMD) <bp@alien8.de>
Mon, 15 Sep 2025 10:28:21 +0000 (12:28 +0200)
resctrl_arch_rmid_read() adjusts the value obtained from MSR_IA32_QM_CTR to
account for the overflow for MBM events and apply counter scaling for all the
events. This logic is common to both reading an RMID and reading a hardware
counter directly.

Refactor the hardware value adjustment logic into get_corrected_val() to
prepare for support of reading a hardware counter.

Signed-off-by: Babu Moger <babu.moger@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Link: https://lore.kernel.org/cover.1757108044.git.babu.moger@amd.com
arch/x86/kernel/cpu/resctrl/monitor.c

index ed295a6c5e6677fb821147a240ac6e3c7af66e50..1f77fd58e707e9844205478cac2b9442cbb97900 100644 (file)
@@ -217,24 +217,13 @@ static u64 mbm_overflow_count(u64 prev_msr, u64 cur_msr, unsigned int width)
        return chunks >> shift;
 }
 
-int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *d,
-                          u32 unused, u32 rmid, enum resctrl_event_id eventid,
-                          u64 *val, void *ignored)
+static u64 get_corrected_val(struct rdt_resource *r, struct rdt_mon_domain *d,
+                            u32 rmid, enum resctrl_event_id eventid, u64 msr_val)
 {
        struct rdt_hw_mon_domain *hw_dom = resctrl_to_arch_mon_dom(d);
        struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
-       int cpu = cpumask_any(&d->hdr.cpu_mask);
        struct arch_mbm_state *am;
-       u64 msr_val, chunks;
-       u32 prmid;
-       int ret;
-
-       resctrl_arch_rmid_read_context_check();
-
-       prmid = logical_rmid_to_physical_rmid(cpu, rmid);
-       ret = __rmid_read_phys(prmid, eventid, &msr_val);
-       if (ret)
-               return ret;
+       u64 chunks;
 
        am = get_arch_mbm_state(hw_dom, rmid, eventid);
        if (am) {
@@ -246,7 +235,26 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *d,
                chunks = msr_val;
        }
 
-       *val = chunks * hw_res->mon_scale;
+       return chunks * hw_res->mon_scale;
+}
+
+int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_mon_domain *d,
+                          u32 unused, u32 rmid, enum resctrl_event_id eventid,
+                          u64 *val, void *ignored)
+{
+       int cpu = cpumask_any(&d->hdr.cpu_mask);
+       u64 msr_val;
+       u32 prmid;
+       int ret;
+
+       resctrl_arch_rmid_read_context_check();
+
+       prmid = logical_rmid_to_physical_rmid(cpu, rmid);
+       ret = __rmid_read_phys(prmid, eventid, &msr_val);
+       if (ret)
+               return ret;
+
+       *val = get_corrected_val(r, d, rmid, eventid, msr_val);
 
        return 0;
 }