target/i386: Replace ldtul_p() -> ldn_p()

Prefer ldn_p(target_long_bits) over target-specific ldtul_p().

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20260219191955.83815-30-philmd@linaro.org>

diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
index 291d56b8e132c380aaf249def02ebaed9900e22b..f358bcf9e86a803b31692251cb896d9013914891 100644 (file)
--- a/target/i386/gdbstub.c
+++ b/target/i386/gdbstub.c
@@ -459,6 +459,7 @@ static int i386_cpu_gdb_get_egprs(CPUState *cs, GByteArray *mem_buf, int n)
 
 static int i386_cpu_gdb_set_egprs(CPUState *cs, uint8_t *mem_buf, int n)
 {
+    const unsigned regsz = target_long_bits() / 8;
     CPUX86State *env = &X86_CPU(cs)->env;
 
     if (n >= 0 && n < EGPR_NUM) {
@@ -467,7 +468,7 @@ static int i386_cpu_gdb_set_egprs(CPUState *cs, uint8_t *mem_buf, int n)
          * XCR0[APX_F] (at least for modification in gdbstub) to be enabled.
          */
         if (env->hflags & HF_CS64_MASK && env->xcr0 & XSTATE_APX_MASK) {
-            env->regs[gpr_map[n + CPU_NB_REGS]] = ldtul_p(mem_buf);
+            env->regs[gpr_map[n + CPU_NB_REGS]] = ldn_p(mem_buf, regsz);
 
             /*
              * Per SDM Vol 1, "Processor Tracking of XSAVE-Managed State",
@@ -486,7 +487,7 @@ static int i386_cpu_gdb_set_egprs(CPUState *cs, uint8_t *mem_buf, int n)
                 env->xstate_bv |= XSTATE_APX_MASK;
             }
         }
-        return sizeof(target_ulong);
+        return regsz;
     }
     return 0;
 }