arm64: dts: qcom: monaco: Add HS/SS endpoints for USB1 controller

Add a port node exposing the High‑Speed and Super‑Speed endpoints,
allowing the USB controller to be linked through the device‑tree
graph.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260313103824.2634519-2-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi
index 0fd3168d0f62bdc5a7c042b33fc9971cf2b85cf4..f3258b0f183eb7654740ea453dafa13a21e28972 100644 (file)
--- a/arch/arm64/boot/dts/qcom/monaco.dtsi
+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi
@@ -5191,6 +5191,25 @@
                        wakeup-source;
 
                        status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+
+                                       usb_1_dwc3_hs: endpoint {
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+
+                                       usb_1_dwc3_ss: endpoint {
+                                       };
+                               };
+                       };
                };
 
                usb_2: usb@a400000 {