drm/rcar-du: dsi: Clean up TXVMPSPHSETR DT macros

Introduce TXVMPSPHSETR_DT_MASK macro and use FIELD_PREP() to generate
appropriate bitfield from mask and value without bitshift.

Do not convert bits and bitfields to BIT() and GENMASK() yet, to be
consisten with the current style. Conversion to BIT() and GENMASK()
macros is done at the very end of this series in the last two patches.

Reviewed-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://patch.msgid.link/20251028232959.109936-8-marek.vasut+renesas@mailbox.org
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>

diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h
index 44220c7112315d962909b4397dae4a4906744759..cfaa9b345308f71fcbb9255697baff28b9dc9950 100644 (file)
--- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h
+++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi_regs.h
@@ -168,11 +168,12 @@
 #define TXVMSCR_STR                    (1 << 16)
 
 #define TXVMPSPHSETR                   0x1c0
-#define TXVMPSPHSETR_DT_RGB16          (0x0e << 16)
-#define TXVMPSPHSETR_DT_RGB18          (0x1e << 16)
-#define TXVMPSPHSETR_DT_RGB18_LS       (0x2e << 16)
-#define TXVMPSPHSETR_DT_RGB24          (0x3e << 16)
-#define TXVMPSPHSETR_DT_YCBCR16                (0x2c << 16)
+#define TXVMPSPHSETR_DT_MASK           (0x3f << 16)
+#define TXVMPSPHSETR_DT_RGB16          FIELD_PREP(TXVMPSPHSETR_DT_MASK, 0x0e)
+#define TXVMPSPHSETR_DT_RGB18          FIELD_PREP(TXVMPSPHSETR_DT_MASK, 0x1e)
+#define TXVMPSPHSETR_DT_RGB18_LS       FIELD_PREP(TXVMPSPHSETR_DT_MASK, 0x2e)
+#define TXVMPSPHSETR_DT_RGB24          FIELD_PREP(TXVMPSPHSETR_DT_MASK, 0x3e)
+#define TXVMPSPHSETR_DT_YCBCR16                FIELD_PREP(TXVMPSPHSETR_DT_MASK, 0x2c)
 
 #define TXVMVPRMSET0R                  0x1d0
 #define TXVMVPRMSET0R_HSPOL_HIG                (0 << 17)