gdbstub: Always infer gdb_num_core_regs when using XML file

Rather correct inferred count over invalid manual one.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20260219191955.83815-10-philmd@linaro.org>

diff --git a/gdbstub/gdbstub.c b/gdbstub/gdbstub.c
index b45eb7c7b2bd301b4588bc225f46741388577cfa..90f4b95135b8f60ebbe61dd9c7ab147641648d72 100644 (file)
--- a/gdbstub/gdbstub.c
+++ b/gdbstub/gdbstub.c
@@ -593,6 +593,7 @@ void gdb_init_cpu(CPUState *cpu)
         gdb_register_feature(cpu, 0,
                              cc->gdb_read_register, cc->gdb_write_register,
                              feature);
+        assert(!cc->gdb_num_core_regs);
         cpu->gdb_num_regs = cpu->gdb_num_g_regs = feature->num_regs;
     }
 

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 89934b8efe25e49dc36d46fa2256919f58b6ac3a..7d2f4459d2bfa0b556d73a0d52cbdb28837cd3f1 100644 (file)
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -128,9 +128,9 @@ struct SysemuCPUOps;
  * @gdb_adjust_breakpoint: Callback for adjusting the address of a
  *       breakpoint.  Used by AVR to handle a gdb mis-feature with
  *       its Harvard architecture split code and data.
- * @gdb_num_core_regs: Number of core registers accessible to GDB or 0 to infer
- *                     from @gdb_core_xml_file.
  * @gdb_core_xml_file: File name for core registers GDB XML description.
+ * @gdb_num_core_regs: Number of core registers accessible to GDB if no
+ *                     @gdb_core_xml_file available (otherwise inferred).
  * @gdb_get_core_xml_file: Optional callback that returns the file name for
  * the core registers GDB XML description. The returned value is expected to
  * be a simple constant string: the caller will not g_free() it. If this

diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 1780db7d1e297fe7465825cf5c3652b61a0ae222..e0e13d31e551c97632c4383a1b86fad8bff9a670 100644 (file)
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -295,7 +295,6 @@ static void alpha_cpu_class_init(ObjectClass *oc, const void *data)
     cc->disas_set_info = alpha_cpu_disas_set_info;
 
     cc->tcg_ops = &alpha_tcg_ops;
-    cc->gdb_num_core_regs = 67;
 }
 
 #define DEFINE_ALPHA_CPU_TYPE(base_type, cpu_model, initfn) \

diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 0b5610d02d5af5024ce5510f8ee69dd9e568fc0c..3d932a5642b797afdff018325d8b48ca3842e864 100644 (file)
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7551,8 +7551,6 @@ static void ppc_cpu_class_init(ObjectClass *oc, const void *data)
                       MMU_INST_FETCH == 2 && PAGE_READ == 1 &&
                       PAGE_WRITE == 2 && PAGE_EXEC == 4);
 #endif
-
-    cc->gdb_num_core_regs = 70;
     cc->gdb_arch_name = ppc_gdb_arch_name;
 #if defined(TARGET_PPC64)
     cc->gdb_core_xml_file = "power64-core.xml";

diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 3991681d1d1b7d3cfc572fc048d4929d59247188..c11d600dc30ea33fc5052592bb7af03eddfa509a 100644 (file)
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -1092,7 +1092,6 @@ static void sparc_cpu_class_init(ObjectClass *oc, const void *data)
 
 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
     cc->gdb_core_xml_file = "sparc64-core.xml";
-    cc->gdb_num_core_regs = 86;
 #else
     cc->gdb_num_core_regs = 72;
 #endif