]> git.ipfire.org Git - thirdparty/glibc.git/commitdiff
x86-64: Don't use SSE resolvers for ISA level 3 or above
authorH.J. Lu <hjl.tools@gmail.com>
Wed, 28 Feb 2024 17:51:14 +0000 (09:51 -0800)
committerH.J. Lu <hjl.tools@gmail.com>
Fri, 17 Oct 2025 00:04:28 +0000 (08:04 +0800)
When glibc is built with ISA level 3 or above enabled, SSE resolvers
aren't available and glibc fails to build:

ld: .../elf/librtld.os: in function `init_cpu_features':
.../elf/../sysdeps/x86/cpu-features.c:1200:(.text+0x1445f): undefined reference to `_dl_runtime_resolve_fxsave'
ld: .../elf/librtld.os: relocation R_X86_64_PC32 against undefined hidden symbol `_dl_runtime_resolve_fxsave' can not be used when making a shared object
/usr/local/bin/ld: final link failed: bad value

For ISA level 3 or above, don't use _dl_runtime_resolve_fxsave nor
_dl_tlsdesc_dynamic_fxsave.

This fixes BZ #31429.
Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
(cherry picked from commit befe2d3c4dec8be2cdd01a47132e47bdb7020922)

sysdeps/x86/cpu-features.c
sysdeps/x86_64/dl-tlsdesc.S

index 975b75c68b3b45c8904e456f7e7d6faad151edbc..051d8c2536971a4e7bfe033c1b6d3bbc6eaa60ed 100644 (file)
@@ -18,6 +18,7 @@
 
 #include <dl-hwcap.h>
 #include <libc-pointer-arith.h>
+#include <isa-level.h>
 #include <get-isa-level.h>
 #include <cacheinfo.h>
 #include <dl-cacheinfo.h>
@@ -1116,7 +1117,9 @@ no_cpuid:
               TUNABLE_CALLBACK (set_x86_shstk));
 #endif
 
+#if MINIMUM_X86_ISA_LEVEL < AVX_X86_ISA_LEVEL
   if (GLRO(dl_x86_cpu_features).xsave_state_size != 0)
+#endif
     {
       if (CPU_FEATURE_USABLE_P (cpu_features, XSAVEC))
        {
@@ -1137,22 +1140,24 @@ no_cpuid:
 #endif
        }
     }
+#if MINIMUM_X86_ISA_LEVEL < AVX_X86_ISA_LEVEL
   else
     {
-#ifdef __x86_64__
+# ifdef __x86_64__
       GLRO(dl_x86_64_runtime_resolve) = _dl_runtime_resolve_fxsave;
-# ifdef SHARED
+#  ifdef SHARED
       GLRO(dl_x86_tlsdesc_dynamic) = _dl_tlsdesc_dynamic_fxsave;
-# endif
-#else
-# ifdef SHARED
+#  endif
+# else
+#  ifdef SHARED
       if (CPU_FEATURE_USABLE_P (cpu_features, FXSR))
        GLRO(dl_x86_tlsdesc_dynamic) = _dl_tlsdesc_dynamic_fxsave;
       else
        GLRO(dl_x86_tlsdesc_dynamic) = _dl_tlsdesc_dynamic_fnsave;
+#  endif
 # endif
-#endif
     }
+#endif
 
 #ifndef SHARED
   /* NB: In libc.a, call init_cacheinfo.  */
index 1b80dd8a8c09924b62f75677b9b7ab1d0f62c312..a8889cdfd09438905e5f6ac4303ddb27142083f5 100644 (file)
@@ -20,6 +20,7 @@
 #include <tls.h>
 #include <cpu-features-offsets.h>
 #include <features-offsets.h>
+#include <isa-level.h>
 #include "tlsdesc.h"
 
 /* Area on stack to save and restore registers used for parameter
@@ -78,12 +79,14 @@ _dl_tlsdesc_undefweak:
        .size   _dl_tlsdesc_undefweak, .-_dl_tlsdesc_undefweak
 
 #ifdef SHARED
-# define USE_FXSAVE
-# define STATE_SAVE_ALIGNMENT  16
-# define _dl_tlsdesc_dynamic   _dl_tlsdesc_dynamic_fxsave
-# include "dl-tlsdesc-dynamic.h"
-# undef _dl_tlsdesc_dynamic
-# undef USE_FXSAVE
+# if MINIMUM_X86_ISA_LEVEL < AVX_X86_ISA_LEVEL
+#  define USE_FXSAVE
+#  define STATE_SAVE_ALIGNMENT 16
+#  define _dl_tlsdesc_dynamic  _dl_tlsdesc_dynamic_fxsave
+#  include "dl-tlsdesc-dynamic.h"
+#  undef _dl_tlsdesc_dynamic
+#  undef USE_FXSAVE
+# endif
 
 # define USE_XSAVE
 # define STATE_SAVE_ALIGNMENT  64