riscv: dts: sifive: add missing #interrupt-cells to pmic

[ Upstream commit ce6b6d1513965f500a05f3facf223fa01fd74920 ]

At W=2 dtc complains:
hifive-unmatched-a00.dts:120.10-238.4: Warning (interrupt_provider): /soc/i2c@10030000/pmic@58: Missing '#interrupt-cells' in interrupt provider

Add the missing property.

Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
index b40990210fb50508bf2afba5366008ec6336dcc0..3c621f31b5fd20e59adbf6554285cff4e84f9234 100644 (file)
--- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
@@ -70,6 +70,7 @@
                interrupt-parent = <&gpio>;
                interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
                interrupt-controller;
+               #interrupt-cells = <2>;
 
                regulators {
                        vdd_bcore1: bcore1 {